Calculation decay time constant (tau) for distributed capacitence

What's an approach to calaculate or approximate the time constant for the distributed RC-Network as given below?

Hi,
it seems to be a FET circuit. With a swtiching FET usually gate- and drain- voltage changes. Then the miller effect takes into account.

In your schematic there are at least 4 points where you may calcutate an RC constant, and i think that they all have different tau values.

Klaus

Choose a capacitor and assume it is charged. Set all nodes to 0V. (I suppose you can disconnect all other capacitors, but I'm not certain.)

You then have a capacitor discharging through certain resistors (a resistor network).

Reduce the network to its simplest forum. Calculate its resistance. Then you can calculate the time constant on that particular capacitor.

The above steps will work for the middle 2 capacitors. Your schematic shows no resistance neighboring the top and bottom caps, therefore their influence may override other influences (in certain instances). You may need to install some ohm value inline with the top and bottom caps.

Finally you'll want to determine the overall time constant. There is a way to weight the influences, based on the proportions of the resistor values. This becomes a tedious process to calculate.

BradtheRad said:

Choose a capacitor and assume it is charged. Set all nodes to 0V. (I suppose you can disconnect all other capacitors, but I'm not certain.)

You then have a capacitor discharging through certain resistors (a resistor network).

Click to expand...

Isn't this actually supperposotion? And doesn't suppre posotion only work for linear circuit elementrs? My aim is to to understand the influence of the channel resistence on the decay time constant for an long channel (L/W = 100/2) MOS-Cap.

The d & s on your schematic implies this is a fet. Then I guess the calculation is not so simple as for an ordinary RC network. It will take someone more knowledgeable to answer your question.

1. A MOSFET used as capacitor would have source and drain shorted.
2. Strictly spoken, the distributed structure can't be described by a single time constant, but it's usual to calculate an ESR number and time constant for MOSFET capacitors.
3. Razavi mentions that the effective time constant for shorted s-d would be one third of Cg*Rs/4. (Design of analog CMOS Integrated Circuits, 2001, pg 623)