PLL top-level simulation LC VCO is not oscillating

Hi,
I have a PLL target running at 12.5GHz.
Schematic top level works. Standalone post-layout VCO also works.
But top level post-layout PLL simulation is not working.
I've tried all the methods i can think of: 1. add initial condition at VCO outputs; 2. set max. step. 3. add a current pulse injection at one of VCO outputs; (4. i haven't tried to ramp up the VDD yet, i will do that later)
The problem is VCO is quite. and the divider itself has a oscillating freq. which is higher than VCO. So that the feedback clock is faster than ref. clock; Vctrl is trying to decrease more, but Vctrl is already very low now. so is kind of positive feedback that PLL will never lock. Anyway, the key thing is why the VCO is not oscillating?
did anybody have this problem before?
Thanks a lot!

How you have made the VCO start-up when it's simulated standalone ?? PLL divider might be loaded your VCO excessively ?
Have you ever tried your VCO functionality with different load conditions ?? Any MC simulation ?? Have you ever check the sensitivity of your VCO against load and reactive part of the load ???

yes, i did consider divider and VCO buffer load, VCO alone works fine with post-layout simulation.
I have add another 10fF parasitic cap. no MC, sensitivity simulation yet.

prcken said:

yes, i did consider divider and VCO buffer load, VCO alone works fine with post-layout simulation.
I have add another 10fF parasitic cap. no MC, sensitivity simulation yet.

Click to expand...

10 fF parasitic cap is pretty low.Interconnections between VCO and divider may have more than this value.In additional to this, divider may resistively/reactively load the VCO.
In fact, you should do a sensitivity analysis with the VCO stand alone in order to be sure that the VCO will work in any circumstance.This is important...
I designed a quite critical VCO and I did 9600 PSS++PNOISE simulation ( against temp, VDD, load, Vvaricap etc) to be sure the functionality of the VCO.
Other blocks can work somehow but if the VCO doesn't work, the system breaks down..

yep, 10fF is not much, but i added up to 50fF for standalone VCO post layout simulation, also oscillates. so far I just run both at nominal corner. I want to make sure it works at least at tt corner first, then think about other scenario.
is there a possibility that VCO will start to oscillate after some time? i am still letting the simulation running, want to wait a little longer to see if there is a chance that VCO becoming alive

- - - Updated - - -

I just tried to extract C+Cc in the PEX setting. it oscillates now.
But R+C+Cc extraction is not working. i noticed that for R+C+Cc, in the netlist, the VCO outputs has >220 Ohm parasitic resistance:

mr_ni "vcob" 237.969 4.96513e-14 4.62215e-14 '
mr_ni "vco" 241.069 4.70325e-14 4.76577e-14

any comments?

Thanks!

prcken said:

yep, 10fF is not much, but i added up to 50fF for standalone VCO post layout simulation, also oscillates. so far I just run both at nominal corner. I want to make sure it works at least at tt corner first, then think about other scenario.
is there a possibility that VCO will start to oscillate after some time? i am still letting the simulation running, want to wait a little longer to see if there is a chance that VCO becoming alive

- - - Updated - - -

I just tried to extract C+Cc in the PEX setting. it oscillates now.
But R+C+Cc extraction is not working. i noticed that for R+C+Cc, in the netlist, the VCO outputs has >220 Ohm parasitic resistance:

mr_ni "vcob" 237.969 4.96513e-14 4.62215e-14 '
mr_ni "vco" 241.069 4.70325e-14 4.76577e-14

any comments?

Thanks!

Click to expand...

You know well the necessary oscillation conditions and therefore any oscillator can start to oscillate after a bit later while the others are starting to oscillate immadiately.It's absolutely depended on oscillator design and loading conditions.Loads play an important role on oscillations ( pulling,start-up,drift etc.).
Is 220 Ohm the load which is seen by VCO ??

BigBoss said:

Is 220 Ohm the load which is seen by VCO ??

Click to expand...

Yes, I am using Calibre PEX for extraction. I think that's mean the VCO outputs' parasitic resistance seen respect to the ground. no, it should be just series resistance. if it's to the ground, things will be wrong.
I am thinking to modify layout and see
and the size extracted calibre file differs a lot between the two. 10M for without R, 132M for with R

after changing the VCO layout, top-level PLL post simulation works
from the netlist it show R reduced, i think the R kills the Q so that VCO is dead
mr_ni "vcob" 201.219 4.22513e-14 5.86118e-14
mr_ni "vco" 205.062 3.6997e-14 5.42499e-14