DoYouLinux
Advanced Member level 4
Hi all,
I am very curious about a schematic simulation. In ADS 2012, I tried to simulate an S parameter of a single-stage common-emitter amplifier. This amplifier consists of only 1 transistor (BJT). Then, I just added another BJT, which every terminal is connected to ground (let's call this a Dummy BJT).
Surprisingly, the S parameter results before I added the Dummy BJT and after are not the same. It is not so much, for example, impedances corresponding to S11_before = 30 + j20 and that of S11_after = 35 + j22. But, this Dummy BJT should not lead to any affect and the results between before and after adding it should be the same. I am wondering about the substrate ... the BJT has 3 terminals and when open its property window, I saw the body node = sub is written ....
Any idea ????
DYL
I am very curious about a schematic simulation. In ADS 2012, I tried to simulate an S parameter of a single-stage common-emitter amplifier. This amplifier consists of only 1 transistor (BJT). Then, I just added another BJT, which every terminal is connected to ground (let's call this a Dummy BJT).
Surprisingly, the S parameter results before I added the Dummy BJT and after are not the same. It is not so much, for example, impedances corresponding to S11_before = 30 + j20 and that of S11_after = 35 + j22. But, this Dummy BJT should not lead to any affect and the results between before and after adding it should be the same. I am wondering about the substrate ... the BJT has 3 terminals and when open its property window, I saw the body node = sub is written ....
Any idea ????
DYL