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how to convert verilog into schematic in OS X?

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simongu89

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I am using iverilog to do design and simulation in OS X for my verilog class.
I am wondering if there is any tool in OS X that can convert verilog into schematic? I know in windows, there is software like Vivado or Quartus that can do such things.

Macbook is so portable. It will be nice if I can write code and generate schematic on one machine. Are there any tool can do schematic from verilog code in OS X?

Thank you very much!
 

I've never used macs but you could use a VM and run Window or linux on the machine then you could run Vivado or Quartus.
 

I am using iverilog to do design and simulation in OS X for my verilog class.
I am wondering if there is any tool in OS X that can convert verilog into schematic? I know in windows, there is software like Vivado or Quartus that can do such things.

Macbook is so portable. It will be nice if I can write code and generate schematic on one machine. Are there any tool can do schematic from verilog code in OS X?

Thank you very much!

I run & develop purely on OSX, unfortunately OSX is poorly supported for design tools ( yes , I know all about all the 'good' open-source stuff that you can compile yourself… good luck with that)

Save yourself a ... load of time,
Go get 'vmware fusion' then run an image of windows/linux.

The way I do it…. is go download the Altera/Xilinx 'free webpack' tools and select a 'free device', then do your ' stuff in there, even for a 'pro' there are 'free' devices which allow you to build massive schematics.
 
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I am using iverilog to do design and simulation in OS X for my verilog class.
I am wondering if there is any tool in OS X that can convert verilog into schematic? I know in windows, there is software like Vivado or Quartus that can do such things.

Macbook is so portable. It will be nice if I can write code and generate schematic on one machine. Are there any tool can do schematic from verilog code in OS X?

Thank you very much!

Vivado and Quartus dont just create scematics, they are the entire build chain for the FPGA.
Afaik, all design tools are windows/linux only.
 

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