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[SOLVED] Getting each output twice from LFSR

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Utshash

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Hi.
I am trying to make a 32'bit LFSR with a given initial state. I am posting the code and stimulus below.


Code Verilog - [expand]
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/*------------------------------------------*/
module lfsr (clock, reset, out);
  
  input clock, reset;
  output [31:0] out;
  
  reg [31:0] temp;
  wire newbit;
  
  xor (newbit,temp[0],temp[10],temp[30],temp[31]);
  
  initial
  temp = 32'hffffffff;
  
  always @(posedge clock)
  begin
    temp <= {newbit,temp[31:1]};
  end
  
  assign out = temp;
     
endmodule
 
/*------------------------------------*/
 
 
//Stimulus
 
module lfsrstimulus;
  reg CLOCK, RESET;
  wire [31:0] OUT;
  
  lfsr l1 (CLOCK, RESET, OUT);
  
  initial
  $monitor($time, "Clock = %b, Output = %b\n", CLOCK,OUT);
  
  initial
  begin
  CLOCK = 1'b1;  
  forever #10 CLOCK = ~CLOCK;
  end
  
  initial
  #100 $finish;
  
endmodule
 
/*--------------------------------------------*/


The problem I am having is that when I run the stimulus, each output comes twice. Is this because of timing delays?

Thanks in advance for any help. :)
 
Last edited by a moderator:

No. It is because you choose to confuse yourself. The simulation looks okay. The lfsr gets a new value at every positive going edge of clock. The monitor statement in this case prints the contents of the lfsr registers both when clock is low, and when clock is high. Which is why you perceive it as "double".
 
use something like:

Code Verilog - [expand]
1
@(posedge CLOCK) $display("%t, Output = %b\n", $time, OUT);


then you'll only see one output each clock
 

Another missed learning opportunity of reading the $monitor man page. :( But yes, that is probably the kind of output he's expecting. :)
 

Utshash should still read the $monitor man page.
 

Homo sapiens + path of least resistance equals exactly. ;-)

But I agree. He would do well to read the $monitor documentation. It has a key sentence in it that explains why it shows things the way it does.
 

Thank you all. I see my mistake now and as suggested by all of you, I'll read the $monitor documentation. Thanks again. :)

- - - Updated - - -

Thank you all for replying and pointing out my stupidity. As suggested by most of you, I'll try to read the $monitor documentation as soon as possible. Thanks again. :)
 
People that read documentation get free internet cookies! :)
 

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