Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

how to nterface seven segment and LCD display of spartan6 FPGA board with my CPU

Status
Not open for further replies.
G

gyrajput

Junior Member level 1
Joined
Sep 19, 2013
Messages
15
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
92
Hello all,
I need to get output of my matlab simulation on spartan 6 XC6SLX150T FPGA LCD display,
steps are as follow
1) i run my simulation with xilinx 14.1 system generator,
2) i run the .xise file generated in matlab with the xilinx 14.1,
3)the program get synthesize, implemented design, generated programming file,
4)in configure Target device i add the .bit file........
but no program succeeded .....
can any one help me how to get my output on LCD display please help me.......

i had attached the print screen file in attachment........ matlab.jpgsystemgen.jpng.pngonpeinXilinx.jpg
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top