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dumping the JTAG signal generated by xilinx Impact tool

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mehrzad321

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Hi All,

I'm looking for any tool, document, application note,.. you name it, for logging the JTAG signals generated by Xilinx Impact. Actually I want it for compare it against the signals generated by XAPP058 which is a software implementation of jtag master protocol. it reads in the .xsvf file format and interpret it to generate desired TMS,TDI and TCLK signals.
I haven't found anything in Impact for doing that.

waiting for your kind attention.

cheers,
Mehrzad.
 

I think your best bet is to hook up a logic analyzer and sample the jtag bus.

Alternatively: I know that for Chipscope there are tcl/tk files provided with ISE. I used that in the past to do some chipscope scripting. Maybe there is something similar for impact/jtag stuff? You'd have to do some rummaging around in the .tcl files. Or google around for it.
 
Thank you mrflibble for your reply.
would you please make it more clear what you mean by tcl/tk files for Chipscope? the only thing I know about Chipscope is its use for sampling internal signals inside FPGA.
 

What I mean by tcl, is that there is tcl support for chipscope provided with ISE. So you can write your own tcl scripts to access chipscope in a design. So maybe there's support for jtag (a la impact) in there as well, but I don't know. It's just a guess that you'd have to check out.

If I now will have to explain how you would have to check that out, forget about it. :p See previous statement about hooking up a logic analyzer and sampling the jtag bus.
 

What I mean by tcl, is that there is tcl support for chipscope provided with ISE. So you can write your own tcl scripts to access chipscope in a design. So maybe there's support for jtag (a la impact) in there as well, but I don't know. It's just a guess that you'd have to check out.

If I now will have to explain how you would have to check that out, forget about it. :p See previous statement about hooking up a logic analyzer and sampling the jtag bus.

or you can hook another fpga to your jtag signals and use it's chipscopr to dump jtag signals to file ...
 

Did a quick check, and there is tcl support for impact.
 

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