sun_ray
Advanced Member level 3
Two designs are clocked with 100 MHz clocks with different clocks being generated from different individual oscillators. Can you suggest a technique to safely transfer the data from one design to the next design?
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I think, there have been similar threads with clearer specification of "data". Particularly: single or multibit data, data rate.
https://www.edaboard.com/threads/284975/
https://www.edaboard.com/threads/259029/
https://www.edaboard.com/threads/252241/
https://www.edaboard.com/threads/249584/
...there is a different and more simple solution to my problem that was sataed in the question. I am looking here for that simple and different solution.
Although I generally agree with jirika that the solution is most likely contained in the previous threads, it's not clear what the present problem exactly is, particularly we don't know the kind of data.Can you think of a simpler solution for my problem?
Well so you know about that more simple solution and still asking? Is it an examination?
If you want to transfer just one signal, use the first link. If you want to transfer a bus, use FIFO link.
Although I generally agree with jirika that the solution is most likely contained in the previous threads, it's not clear what the present problem exactly is, particularly we don't know the kind of data.
Not at all. The simple question asked by jirika (single signal or bus) hasn't been answer.Problem is clearly stated.
Not at all. The simple question asked by jirika (single signal or bus) hasn't been answer.
Hi,
you will not a small phase drift .
Hi,
In reality, as 2 source of clock are used you will not a small phase drift between the two clock.
If this shift is too slow, you can consider your system as mesochornous and use mesochronous synchronizer for transferring your data from one block to another