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soft logic implementation in xilinx virtex5 FPGA

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Hi

its written V5 data sheet that ethernet can be implemented as SOFT LOGIC can u plz explain what SOFT LOGIC mean here

does it mean that all the logic will be implemented in Xilinx and we dont need any external Hard ware

regards
 

At the very least you'll still need some magnetics. ;-) I would guessthat you'd also need a PHY, but I am not sure... I would expect the ethernet MAC + some fifo's to be implemented inside the fpga, and then PHY etc outside. But as said, at the very least you need the magnetics so you will always need some external hardware.
 

What it means is you can use logic inside the FPGA fabric rather than using a dedicated hard core to do it. Using a hard coure uses no internal resources other than the hard core itself, maybe a little for routing. Hard cores can usually be clocked faster.

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and no external interface is needed for either option.
 

Ok

so wat i understood is that i will need to design a core inside the FPGA no external IC is required. Only the Connector is to be connected at the output of the FPGA

?????

Thanx
 

you would need to read the data sheet for specifics.
 

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