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vhdl programming!!!!

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VINUVIJAYAN

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can anyone please help me with how to open a text file and store the message into a register????
 

Yes. Post the code you're having problems with.
 

thank u so much fr replyin...

i basically am a starter and i have learned the basics quite well...now what i want to know is:
1)open a text file with a message in vhdl
2)store the message onto registers

here is my code

--to open file
type STD_LOGIC_FILE is file of STD_LOGIC_VECTOR;
type BIT_FILE is file of BIT_VECTOR;
file SHA1:TEXT open READ_MODE is "/user/home/jb/add.sha'';

(is this code correct?if not can u suggest me the proper code or help me with coding...if this is correct is this enough for me to read the contents in it?)

now next i want to store the contents of this text file onto a register...i think i know how to declare a register..my code is

--register declaration
entity reg_decl is
eng reg_decl;

architecture reg_decl is
generic(START:CHARACTER:=0;STOP:INTEGER:=512);
port(D:in STD_LOGIC_VECTOR(START to STOP),Q:eek:ut STD_LOGIC_VECTOR(START to STOP),CLOCK:in STD_LOGIC);
end reg_decl;

is this correct....or if i have totally got the basics wrong..pls help me...tell me what the above codes do and pls help me as to hw to open a text file..read contents and store the same to a 512 bit register..thank u so much again for giving me ur time.. :)
 

I assume this code is testbenching code or a model, because file IO cannot be used for synthesis onto an FPGA.

Also, you code is very incomplete. All it does is declare some types and appears to be instantiating some component that you have not named or posted the code for.
 

can you pls help me????:-(

- - - Updated - - -

please teach me then how to read a text file message onto a register in vhdl???
 

Well for a testbench, you're not using the correct package, you should be using textio - it already has a file type, Text, declared for you and assosiated read/write and readline/writeline procedures. There are numerous tutorials around the web, so use google.

For actually doing it in an FPGA, why would you do that? you would need a file handler system and some storage. Why not just get a PC to read the text file and transmit it to the FPGA for processing?
 
OK fine....thanks a lot to u,i now know how to open a file,read it line by line.now my next step is that i want to store the contents of the file onto a register say of 512 bits or so....how is that done???...i had posted my register declaration code before...but it was wrong is what you said...so kindly explain me how to create a register and store contents of the text file onto it...if you could explain with a code it would be very helpful...please help me..i need this badly..thank u so much...
 

I haven`t come across any vectors that is of length 512...it seems too long to me. of course I`m still quite a newbie...
the following code "store", or say input the data from file DATA to the signal data_in_temp, you need to sync it before use data_in_temp.
or google vhdlguru+file, that blog might help.


Code VHDL - [expand]
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read:process
    variable inline : line;
    variable da : std_logic_vector(N-1 downto 0);  -- define N yourself.
    begin
        if(endfile(DATA))then   -- DATA is the file.
            wait;
        elsif data_en = '1' then
            readline(DATA,inline);
            read(inline,da);
        else
            data_in_temp <= (others => '0');
        end if;
        data_in_temp <= da;
        wait for CLK ns;
    end process;

 

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