joder
Newbie level 6
Dear all,
For some reasons, i can't do the balance clock tree in back-end. Instead, I need to balance in synopsys dc_shell. My problem is:
There are two cpu clock domains, clk1 and clk2, both running at 25Mhz. They are from the same source, clktop, but have different control due to some power saving mode to disable the 2 clocks.
However, some signals need to be transferred (or FF'ed) between these 2 clocks.
I tried to use balance_buffer to do the clock tree balance. But postsim errors occur with FFs controlled by 2 unbalanced clocks.
Is there any other commands in DC that I can use to solve the sync problems?
<ps> I tried to use create_generated_clock for these 2 clocks but same situations here.
Thx a lot.
For some reasons, i can't do the balance clock tree in back-end. Instead, I need to balance in synopsys dc_shell. My problem is:
There are two cpu clock domains, clk1 and clk2, both running at 25Mhz. They are from the same source, clktop, but have different control due to some power saving mode to disable the 2 clocks.
However, some signals need to be transferred (or FF'ed) between these 2 clocks.
I tried to use balance_buffer to do the clock tree balance. But postsim errors occur with FFs controlled by 2 unbalanced clocks.
Is there any other commands in DC that I can use to solve the sync problems?
<ps> I tried to use create_generated_clock for these 2 clocks but same situations here.
Thx a lot.