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shift left/shift right in VHDL

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dksagra

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Dear

Question: how to shift left or shift right t

Rough program as follows

Code:
library IEEE
...
...

Package matrix_types Is
Type matrix_4x1 Is Array (1 to 4) Of std_logic_vector (7 downto  0);
Type matrix_1x4 Is Array (1 to 4) Of std_logic_vector (7 downto  0);
Type matrix_4x4 Is Array (1 to 4, 1 to 4) Of std_logic_vector (7 downto
0);
End Package matrix_types ;
...
...
architecture.......
begin
.....
process
.......

Variable x : matrix_4x1 :=
("000000100",
"0000000000",
"0011110000",
"0010110001");

begin
QUERY: Now i have to shift left or shift right EACH ROW of variable x either TWICE or
THRICE etc.

Please reply me dear...

Thanks and Best Regards,
 
Last edited by a moderator:

a <= b(6 downto 0) & '0'; -- shift left with '0' add
a <= '0' & b(7 downto 1); -- shift right with '0' add
...
 

Thanks for the reply..
you are right..but this is the case when you have single variable std_logic_vector, in my case its a matrix of 4x1.

Variable x : matrix_4x1 :=
("000000100",
"0000000000",
"0011110000",
"0010110001");

how can i shift each row of this matrix?
 

you should used a variable which
VARIABLE v_row : STD_LOGIC_VECTOR(7 DOWNTO 0);

on which you apply the shift before to rewrite it in the array.

and if you want to do it for each row, you could used a LOOP.
 

thanks for your valuable time..

if possible for you, can you please explain in detail with the example..

as for Variable x : matrix_4x1 :=
("000000100",
"0000000000",
"0011110000",
"0010110001");

please look after it...
thanks and Regards
 

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