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need help regarding multiplication * operator in VHDL

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revooridinesh

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my code is like


Code VHDL - [expand]
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;  
 
entity xx ....end xx;
 
architecture Behavioral of xx is
....
signal inst : real;
begin
process(clk)
variable mn : real
begin
if(rising_edge(clk)) then
inst<= some value
if ((inst<0.10 and inst>=0.00 ) or (inst>-0.10 and inst<=0.00) ) then
         mn:= abs(inst*100);
------
---




then I am getting a error as--- found '0' definitions of operator "*", cannot determine exact overloaded matching definition for "*". What does that mean ? I have included libraries which are required . Where did I do mistake ?

Thank You
 
Last edited by a moderator:

if ((inst<0.10 and inst>=0.00 ) or (inst>-0.10 and inst<=0.00) ) then
mn:= abs(inst*100.0);

then I am getting a error as--- found '0' definitions of operator "*", cannot determine exact overloaded matching definition for "*". What does that mean ? I have included libraries which are required . Where did I do mistake ?

A rather annoying feature of the language is that the multiply operator is not defined for multiplying a 'real' and an 'integer'. Change the 100 to 100.0 in your code and you should be good to go.

Kevin Jennings
 
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