revooridinesh
Member level 1
my code is like
then I am getting a error as--- found '0' definitions of operator "*", cannot determine exact overloaded matching definition for "*". What does that mean ? I have included libraries which are required . Where did I do mistake ?
Thank You
Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.NUMERIC_STD.ALL; entity xx ....end xx; architecture Behavioral of xx is .... signal inst : real; begin process(clk) variable mn : real begin if(rising_edge(clk)) then inst<= some value if ((inst<0.10 and inst>=0.00 ) or (inst>-0.10 and inst<=0.00) ) then mn:= abs(inst*100); ------ ---
then I am getting a error as--- found '0' definitions of operator "*", cannot determine exact overloaded matching definition for "*". What does that mean ? I have included libraries which are required . Where did I do mistake ?
Thank You
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