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sine wave with different frequency using FPGA

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I am generating sine wave from DDS Core. But there is some noise riding on the sine wave. Can you please tell me whether i have to put a filter or change my code. BPSK part of my code is as follows.

process (pulse_bpsk,CLK_125MHz,sine_pos,sine_neg)
begin
if pulse_bpsk = '1' then
DATA_temp <= sine_pos & "0000000000" ;
elsif pulse_bpsk = '0' then
DATA_temp <= sine_neg & "0000000000" ;
end if;
end process;

where DATA_temp is the output to DAC.
 

There are many questions:
- what kind of "noise" are you talking about? Can you show a waveform?
- is pulse_dsp synchronous to the DDS clock, e.g. originated from the same clock main?
- does the DAC use an input clock?
- did you constrain/check the design timing, including the DAC interface?
 

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