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Verilog how to choose LUT under different condition

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lien0205

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Currently I have three LUT ROM module written by verilog. The thing is under different condition, the behavior module I am writing will work on the data from only one certain LUT of the three. How could I deal with the code structure? I know I may need to initialize all of the three modules in my behavior but I don't know how to choose the data according to a certain condition.

Thanks,

Lien
 

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