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how to set the appropriate constraints?

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roger

roger

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Hi all:
How to set the appropriate constraints? Is there any rule?
about clk
1. set_clock_transition -rise -max a
2. set_input_transition -rise -min b
about design rule
3. set_max_transition c
4. set_max_capacitance d

how to decide a,b,c,d ?

TKS in advance
 

hi,
a ,b are depend on your system level design, not depend on your mind .
and also depend on tech you use.
c, d are normally depend on your library, and dont need to set .
 

c/d is depend on the Vendor's libraray.

You should set this value as DRC in Des1gn_C0mpiler.
 

linuxluo said:
hi,
a ,b are depend on your system level design, not depend on your mind .
and also depend on tech you use.
c, d are normally depend on your library, and dont need to set .
Click to expand...

what's the traditional value of the a,b?
how to find c,d in the library?
tks
 

Any example please?
 

All,

How to qualify your constraints if you do some new design. How to verify them after the synthesis? Run STA? or run gate level sims?
 

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