[SOLVED] Problems with Memristor modeling in LTSpice

Hi,

Has anyone used a spice model of memristor? I am trying to use the model proposed in BIOLEK's paper (https://www.radioeng.cz/fulltexts/2009/09_02_210_214.pdf) in LTspice. There is no error, but I couldn't observe any memresistive feature of the device. I assume this model works on Pspice since the paper claims so. Does function SDT() supported in LTSpice? Or is it because of something else?

The code is pasted here:


* HP Memristor SPICE Model
* For Transient Analysis only
* created by Zdenek and Dalibor Biolek
**************************
* Ron, Roff - Resistance in ON / OFF States
* Rinit - Resistance at T=0
* D - Width of the thin film
* uv - Migration coefficient
* p - Parameter of the WINDOW-function
* for modeling nonlinear boundary conditions
* x - W/D Ratio, W is the actual width
* of the doped area (from 0 to D)
*
.SUBCKT memristor Plus Minus PARAMS:
+ Ron=100 Roff=16K Rinit=11K D=10N uv=10F p=10
***********************************************
* DIFFERENTIAL EQUATION MODELING *
***********************************************
Gx 0 x value={ I(Emem)*uv*Ron/D^2*f(V(x),p)}
Cx x 0 1 IC={(Roff-Rinit)/(Roff-Ron)}
* Raux x 0 1T
* RESISTIVE PORT OF THE MEMRISTOR *
*******************************
Emem plus aux value={-I(Emem)*V(x)*(Roff-Ron)}
Roff aux minus {Roff}
***********************************************
*Flux computation*
***********************************************
Eflux flux 0 value={SDT(V(plus,minus))}
***********************************************
*Charge computation*
***********************************************
Echarge charge 0 value={SDT(I(Emem))}
***********************************************
* WINDOW FUNCTIONS
* FOR NONLINEAR DRIFT MODELING *
***********************************************
*window function, according to Joglekar
.func f(x,p)={1-(2*x-1)^(2*p)}
*proposed window function
;.func f(x,i,p)={1-(x-sttp(-i))^(2*p)}
.ENDS memristor

Xmemrist aa 0 memristor
Vtest 0 aa SIN(0 1.2V 1 0 0 0)
.tran 0.1s 3s
.option post
.end


Thanks,
-Guangyu

I am not familiar with LTSpice. In PSpice, SDT is a standard function for time-domain integration. In this code, it is used two times for doing integration of memristor voltage and current in order to obtain flux and charge. The following lines

*Flux computation*
***********************************************
Eflux flux 0 value={SDT(V(plus,minus))}
***********************************************
*Charge computation*
***********************************************
Echarge charge 0 value={SDT(I(Emem))}

can be removed without affecting the model behavior. They serve only for computing flux and charge in order to do X-Y plot of flux-charge constitutive relation of the memristor in the PROBE postprocessor. If LTSpice enables X-Y plotting of integrals directly, you do not need this part of the code. If you need it, you can replace these lines by the well-known modeling of time-domain integrals via current source charging capacitor.
By the way, how did you come to the conclusion that your model does not have memory behavior? If you plot memristor quantities V versus I, you will not obtain pinched hysteresis loop? If you drive memristor by the voltage source with the magnitude and frequency specified in the paper, it works without problems.

They are three things which you should modify in your code (in order to be in conformity with the above mentioned paper):
1] To remove the asterisk from the beginning of the line
* Raux x 0 1T
2] To interchange the Vtest outlets, i.e. to modify the corresponding line as follows:
Vtest aa 0 SIN(0 1.2V 1 0 0 0)
3] To make step ceiling much more smaller (I use PSpice syntax, hope it is the same as in LSpice):
.tran 0 3s 0 3m skipbp
(skipbp is not necessary in this case).

After that, you should make the following X-Y plot in the postprocessor: V(aa) versus -I(Vtest).
Hope this will help
D.

Hi Dalibor,

Thank you for your response. The I-V relation I observe is purely linear as if the memristor is a 10-12Kohm resistor. I made the changes you suggested but the result is the same. Have you successfully observed the hysteresis loop? I would appreciate if you could attach a waveform pic.

By the way, I do not understand modification 2]. Why interchanging the outlet will help?

-Guangyu

Hi,
I do not understand where is the problem because just now I simulated this circuit succesfully in PSpice and then also in Micro-Cap, with the well-known pinched hysteresis loop in the memristor current-voltage response.
The outputs from PROBE are here:



Transient analysis works well for the maximum time step of about 1-5msecs, and for trapezoidal or Gear algorithm. Do you know which method is used in LTSpice? (hope that not Euler integration:grin.

The modification 2: Since memristor is non-linear device, changing the polarity of applied source can completely change the memristor behavior. The hysteresis effects are stronger with the polarity I suggested. In addition, I prefer the formal (but not obligatory) rule that negative (not positive) terminal of the source is grounded.
Hope that the above picture can move you ahead.
D.

Hi Dalibor,

I am sorry that I forgot to mention that I am newbie to SPICE. What are trapezoidal/Gear algorithm and how can I choose from them?
What I used for simulation in Pspice is:

.tran 0 3s 0 3m skipbp
.probe

And I just plot traces after I run the simulation. Is there something more I should do?

-Guangyu

OK, Guangyu,
can you place here a picture with the I/V plot you obtained?
Thanks
D.

---------- Post added at 21:13 ---------- Previous post was at 20:26 ----------

Guangyu,
I think that I know the reason of your problem: LTSpice does not recognize the symbol "^" as the "power operator". You should replace "^" by "**" throughout the source code. Then the memristor model will work properly. I checked it in LTSpice.
With best regards
D.

Yes! I changed ^ to ** and it works! I finally get over this problem which has been bothering me for almost a month!
Thank you, Dalibor, for your professional answers and great patience!

All the bests,
-Guangyu