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Xilinx : How to calculate the Area for any program

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ashokkumar.am

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Hi Friends,

I'm design one project in vhdl/verilog, now i am stuck with to calculate the area.
with the help of formula we can able to find? what formula ?
what values we have to use ?

You guys can help me to finding the area in Xilinx.

i am expecting your reply asap.
 

This is very open-ended. Its not hard to fill any FPGA with a solution to a hard problem. Therefore I expect 100% area use of the largest current FPGA.

Perhaps you have a more specific problem with more specific latency/BW requirements.
 

Hi,

I have completed one program, but i have to find the value for the area consumption for this program.

what are the procedure i have to follow to find the value.
 

You have to synthesize the project in xilinx ise and you will get a report from the fitter about the area occupied in the specified cpld/fpga.
Fitting can only be done using the chips vendor tools, there is no formula to calculate it.

Alex
 
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check the device utilization summay or synthesis report..after doing synthesis
 

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