Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Looking for ways to test FPGA logic

Status
Not open for further replies.
user_asic

user_asic

Advanced Member level 4
Joined
Nov 13, 2009
Messages
100
Helped
7
Reputation
14
Reaction score
2
Trophy points
1,298
Location
Canada
Activity points
1,836
I need a way to test all clbs in a virtex 4 and virtex 5 fpga. But I can't seem to find any sample designs that show how to do this. Most research papers focus on BIST techniques, which is beyond my skill level without any sample designs to look at.

Can anyone point me to some sample designs (no ambiguous tutorials please, as I've probably seen them all), offer any tips, or give a overview of how it is done.

Thanks
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top