Xilinx core generation error (cordic)

I am having an issue with creating and using a Xilinx core I generator using the core generator. My issue is when I add a core to my project (this case a cordic core) and I attempt to implement my design I get an error in the translate process that is shown below:
ERROR:NgdBuild:604 - logical block 'U0' with type 'wrapped_cordic' could not be
resolved. A pin name misspelling can cause this, a missing edif or ngc file,
or the misspelling of a type name. Symbol 'wrapped_cordic' is not supported
in target 'spartan3'.

My code where I try to use this code is shown below:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
library UNISIM;
use UNISIM.VComponents.all;
Library XilinxCoreLib;

entity cordic_test_top is
port (
phase_in: IN std_logic_VECTOR(15 downto 0);
x_out: OUT std_logic_VECTOR(15 downto 0);
y_out: OUT std_logic_VECTOR(15 downto 0);
rdy: OUT std_logic;
clk: IN std_logic);
end cordic_test_top;

architecture Behavioral of cordic_test_top is

component wrapped_cordic
port (
phase_in: IN std_logic_VECTOR(15 downto 0);
x_out: OUT std_logic_VECTOR(15 downto 0);
y_out: OUT std_logic_VECTOR(15 downto 0);
rdy: OUT std_logic;
clk: IN std_logic);
end component;

begin
U0 : wrapped_cordic
port map (
phase_in => phase_in,
x_out => x_out,
y_out => y_out,
rdy => rdy,
clk => clk);
end Behavioral;

Now the error message says that it might be a pin name misspelling ( I doubt that) a missing edif or ngc file. Now I notice a ngc file was created when the core was generated and I don’t think I have to explicitly add this to my file. Does anyone have suggestion on how this may work?

Hi,

You must tell the translate process where to find the ngc file. When you use the GUI you can do this in the process properties of "Implementation" and specify the path to the ngc file in the "Translate Properties" > "Macro Search Path".
In batch you can use the "sd" switch (-sd <path>) in the translate call.

Devas

hmmm that didn't seem to work. I even regenerator the ngc file and cleaned up my project file and verfied that the command line command was added into the compile chain correctly but it didn't seem to do much.

Thank you for your reply though

Is this the "Could not find module/primitive" error?

Here's when I was having difficulties with it back in the mists of time:

http://forums.xilinx.com/t5/EDK-and-Platform-Studio/Getting-ISE-CoreGen-NGC-parts-into-XPS/m-p/9648

Just writing the points came to my mind.May be useful.

1)Either the xco file or ngc file should be added to the the project in xilinx window.
2)The name of the file used in the top module should be same as the file.xco or file.ngc name.

About the 2nd point, make sure that wrapped_cordic.xco is the file added to the project and not the cordic.xco or something else.


--vipin
https://vhdlguru.blogspot.com/