alainsan
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We are trying to upgrade ComBlock FPGA development boards from USB 2.0 full-speed to USB 3.0. Because these boards are centered around Xilinx Spartan-6 FPGAs, the maximum interface speed should not exceed 250-300 MHz.
Can anyone point us to a USB 3.0 PHY (in production (I wish), engineering samples, in the works, planned) which would take process the 5Gbit USB 3.0 signals and interface digitally at low (250 MHz approx.) speed?
We are just looking for the PHY (we take care of the SIE).
Any pointer will be greatly appreciated.
Thank you.
Can anyone point us to a USB 3.0 PHY (in production (I wish), engineering samples, in the works, planned) which would take process the 5Gbit USB 3.0 signals and interface digitally at low (250 MHz approx.) speed?
We are just looking for the PHY (we take care of the SIE).
Any pointer will be greatly appreciated.
Thank you.