Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

regarding the judgement between latency vs area

Status
Not open for further replies.

kotta

Junior Member level 2
Joined
Nov 21, 2006
Messages
22
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,439
Hi All,

Does any body suggest how in general while architecting how to balance AREA vs LATENCY requirements, is RTL configurable is the only way or what else could be the reasons and factors influencing those.

Also is it a good idea to keep small small chunk of memories with different address and data buses in a particular IP for sake of control information. (Say if total memory requirement if 40 k + 32 K bytes) of memory only in an IP)....

Regards
sreedhar...
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top