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HELP!!! Modelsim TCL Error **Error invalid command name &quo

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derrick_chi

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modelsim error in tcl script

Has anyone everseen this error **Error invalid command name "" before? I wrote a tcl script to test some hardware that I designed and when I run the script I get that error. I've pasted the error and the script in below, any help would be apprieciated, thanks.

# ** Error: empty command name ""
# Error in macro C:\Engineering_Projects\I2C\TCL Testbenches\i2c_testbench.tcl line 270
# empty command name ""
# while executing
# "[write_i2c $random_device $register_ptr $cntrl_reg $byte_count] "
# ("while" body line 57)
# invoked from within
# "while {$tranaction_count < 100 } {
#
# global wrdata_array
#
# if { [examine -bin I2C_LOCK] == "1" } {
#
# set random_device [myRand 0 3]
# set dev..."






Code:
do i2c_wave.do 
restart 
set UserTimeUnit ns 

force -freeze Master_CLK 1 0, 0 {10 ns} -r 20 
force -deposit rst 1 
force -deposit CLK_SPEED_SEL 0 
force -deposit I2C_CLK_GEN_W 0 
force -deposit DATA_TO_MASTER 00 
force -deposit CONTROL_INPUT 0000 
force -deposit i2c_cntrl_reg_w 0 
force -deposit SDA 1 
force -deposit I2C_READ 0 
force -deposit I2C_WRITE 0 

run 40 ns 

force -deposit rst 0 
run 40 ns 

force -deposit CLK_SPEED_SEL 35 
force -deposit I2C_CLK_GEN_W 1 

run 20 ns 

force -deposit CLK_SPEED_SEL 0 
force -deposit I2C_CLK_GEN_W 0 

run 20 ns 

set slave_addressr A5 
set slave_addressw A4 

set eeprom_slave_addressr AB 
set eeprom_slave_addressw AA 

set verilog_slave_addressr 21 
set verilog_slave_addressw 20 

set german_slave_addressr C3 
set german_slave_addressw C2 

set i2cs_rx_slave_addressr 23 
set i2cs_rx_slave_addressw 22 

set read_adr_arry(0) $slave_addressr 
set read_adr_arry(1) $eeprom_slave_addressr 
set read_adr_arry(2) $german_slave_addressr 
set read_adr_arry(3) $i2cs_rx_slave_addressr 
set read_adr_arry(4) $verilog_slave_addressr 


set write_adr_arry(0) $slave_addressw 
set write_adr_arry(1) $eeprom_slave_addressw 
set write_adr_arry(2) $german_slave_addressw 
set write_adr_arry(3) $i2cs_rx_slave_addressw 
set write_adr_arry(4) $verilog_slave_addressw 

global wrdata_array 
set wrdata_array(0) 0 


set instruction_array(0) 0 
set instruction_array(1) 1 


proc myRand { min max } { 
set maxFactor [expr [expr $max + 1] - $min] 
set value [expr int([expr rand() * 100])] 
set value [expr [expr $value % $maxFactor] + $min] 
return $value 
} 

proc myRand_hex { dec_min dec_max } { 
set hex_maxFactor [expr [expr $dec_max + 1] - $dec_min] 
set dec_value [expr int([expr rand() * 100])] 
set dec_value [expr [expr $dec_value % $hex_maxFactor] + $dec_min] 
set hex_value [format %02X $dec_value] 
return $hex_value 
} 

proc write_i2c { device registerptr cntrl_reg byte_count } { 

global wrdata_array 

while { [examine -dec I2C_BUSY] == 1 } { run 20 ns } 

force -deposit CONTROL_INPUT $cntrl_reg 
force -deposit i2c_cntrl_reg_w 1 
run 20 ns 

force -deposit i2c_cntrl_reg_w 0 
run 20 ns 

set write_count 0 
set write_op "write to" 

set loop_count [expr $byte_count - 1] 

set loop_termination [expr $loop_count / 4] 

switch -exact -- $device { 

0 { echo "The current transaction is a $byte_count byte write to the PCA955 slave starting at register $registerptr" } 
1 { echo "The current transaction is a $byte_count byte write to the EEPROM slave starting at register $registerptr" } 
2 { echo "The current transaction is a $byte_count byte write to the German slave starting at register $registerptr" } 
3 { echo "The current transaction is a $byte_count byte write to the I2CS_RX slave starting at register $registerptr" } 
4 { echo "The current transaction is a $byte_count byte write to the VERILOG slave starting at register $registerptr" } 
default { error "This $byte_count is not a known device address" } 
} 

while { $write_count < $loop_termination } { 

if { [examine -dec I2C_BUSY] == 0 } { 

force -deposit CONTROL_INPUT $wrdata_array($write_count) 
force -deposit I2C_WRITE 1 
run 20 ns 

force -deposit I2C_WRITE 0 
run 20 ns 

incr write_count 

} else { 

force -deposit I2C_WRITE 0 
run 20 ns 
} 
} 

force -deposit I2C_WRITE 0 
run 20 ns 

} 

proc read_i2c { device registerptr cntrl_reg byte_count } { 

global wrdata_array 

while { [examine -dec I2C_BUSY] == 1 } {run 20 ns } 

force -deposit CONTROL_INPUT $cntrl_reg 
force -deposit i2c_cntrl_reg_w 1 
run 20 ns 
force -deposit i2c_cntrl_reg_w 0 

set read_count 0 

set read_op "read from" 

switch -exact -- $device { 

0 { echo "The current transaction is a $byte_count byte read from the PCA955 slave starting at register $registerptr" } 
1 { echo "The current transaction is a $byte_count byte read from the EEPROM slave starting at register $registerptr" } 
2 { echo "The current transaction is a $byte_count byte read from the German slave starting at register $registerptr" } 
3 { echo "The current transaction is a $byte_count byte read from the I2CS_RX slave starting at register $registerptr" } 
4 { echo "The current transaction is a $byte_count byte read from the VERILOG slave starting at register $registerptr" } 
default { error "This $byte_count is not a known device address" } 
} 

while { $read_count <= [expr $byte_count / 4] } { 

if { [examine -dec I2C_DATA_RDY] == 1 } { 

force -deposit I2C_READ 1 
run 20 ns 
force -deposit I2C_READ 0 
run 20 ns 

if { [examine -hex DATA_FROM_SLAVE] != $wrdata_array($read_count) } { 

error "The data doesn't match, the data that was written was $wrdata_array($read_count) you got back [examine -hex DATA_FROM_SLAVE]" 

} else { 

echo "Read transaction successful" 
} 

incr read_count 

} else { 

force -deposit I2C_READ 0 
run 20 ns 
} 
} 

force -deposit I2C_READ 0 
run 20 ns 
} 


set tranaction_count 0 
set write_count 0 
set regcount 0 

set pcslave_adr_count 0 
set eepromslave_adr_count 0 
set verilogslave_adr_count 0 
set germanslave_adr_count 0 
set i2cs_rx_adr_count 0 

set hexcount [format %02X $regcount] 

while {$tranaction_count < 100 } { 

global wrdata_array 

if { [examine -bin I2C_LOCK] == "1" } { 

set random_device [myRand 0 3] 
set device_address $write_adr_arry($random_device) 

switch -exact -- $random_device { 

0 { set byte_count [myRand 3 4] } 
1 { set byte_count [myRand 3 2047] } 
2 { set byte_count [myRand 3 4] } 
3 { set byte_count [myRand 3 10] } 
4 { set byte_count [myRand 3 4] } 
default { error } 
} 

set timeout_value [format %1X 15] 

set cntrl_reg $device_address 
append cntrl_reg $timeout_value 
append cntrl_reg [format %1X $byte_count] 

set array_byte_count [expr $byte_count - 1] 
set array_sub_count 0 
set array_index 0 

switch -exact -- $random_device { 

0 { set register_ptr [myRand_hex 2 3] } 
1 { set register_ptr [myRand_hex 2 2047] } 
2 { set register_ptr [myRand_hex 2 3] } 
3 { set register_ptr 00 } 
4 { set register_ptr [myRand_hex 2 15] } 
default { error } 
} 

set wrdata_array($array_index) $register_ptr 

while { $array_byte_count != 0 } { 

if { $array_sub_count == 3 } { 

incr array_index 

} else { 

append wrdata_array($array_index) [myRand_hex 1 255] 
set array_byte_count [expr $array_byte_count - 1] 
incr array_sub_count 
} 

} 

[write_i2c $random_device $register_ptr $cntrl_reg $byte_count] 
[read_i2c $random_device $register_ptr $cntrl_reg $byte_count] 

incr tranaction_count 
run 20 ns 
} 

run 200 ns 
}
 

examine command in tcl + vhdl + modelsim

You likely require a TCL debugger. Looks like one of the procs is unrecognized. It is hard to comment without seeing it live, if you can share the IO of your top level code (with which this TCL file is interacting) then I can assist better. Basically I need to get that VLOG/VHDL stub file that shows all declarations of signals being accessed via the TCL file shown

HTH
Ajeetha, CVC
www.cvcblr.com
 

deposit command in tcl

also you can debug the tcl script in the window!
 

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