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65 nm Process and VCO - VCO suffer from high phase noise

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AdvaRes

AdvaRes

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65 nm Process and VCO

Hi all,

Does 65nm technology permits to have VCOs with low phase noise (below -100dBc at 1MHz) ?
In fact my VCO suffer from high phase noise (-65 dBc) and I couldn't improve it.
Is that a limit or I could have made mistakes in transistors dimentionning ?

Please help.

Thanks.
 

65 nm Process and VCO

What is your oscillation frequency?
 

Re: 65 nm Process and VCO

Whats your offset frequency?
-100dbc@10khz is not difficult.
 

Re: 65 nm Process and VCO

No it is -65 dBc @1MHz offset from 2GHz.
 

65 nm Process and VCO

You are using ring oscillator? LC VCO cannot be so bad.
 

Re: 65 nm Process and VCO

psmon said:
You are using ring oscillator? LC VCO cannot be so bad.
Click to expand...
The VCO is a Ring of 4 differential delay cells.
 

Re: 65 nm Process and VCO

Your phase noise looks poor. Phase noise directly trades with power. How much is your power spend? The minimum length transistors are noisy. Increasing the lengths by 20nm or so normally shows huge difference in phase noise
 

Re: 65 nm Process and VCO

AdvaRes said:
psmon said:
You are using ring oscillator? LC VCO cannot be so bad.
Click to expand...
The VCO is a Ring of 4 differential delay cells.
Click to expand...

what kind of ring cell do you use ?
and what is your process?
ah, pn below -100dbc/hz@1M is not difficult for 65 process
more power and select a good structure, and optimum pn
 

Re: 65 nm Process and VCO

saro_k_82 said:
Increasing the lengths by 20nm or so normally shows huge difference in phase noise
Click to expand...

Thanks saro_k_82,

Do you mean a 20um ? Coz 20 nm Channel length is not permitted by the tool. The minimum channel length permitted is 65nm.

I noted that when channel length increase the phase noise decrease considerably. However it has to be very far from the 65nm. With 180nm process VCO's transistor length is 200 nm for good phase noise.
 

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