serial to parallel shift register

I need a vhdl code of serial to parallel shift register

best regards

Try this. (Not tested) :!:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;


entity SerialParallel is
Port (
DATA : in STD_LOGIC;
CLK : in STD_LOGIC;
STRB : int STD_LOGIC;
DATAOUT : out STD_LOGIC_VECTOR(7 downto 0);
);
end SerialParallel;

architecture Behavioral of SerialParallel is

signal pre_latch : std_logic_vector(7 downto 0);


begin

process (CLK) begin
if CLK'event and CLK='1' then
pre_latch(pre_latch'high downto 1)=pre_latch(pre_latch'high-1 downto 1);
pre_latch(0)=DATA;
end if;
end process;

process (STRB) begin
if STRB'event and STRB='1' then
DATAOUT(pre_latch'high downto 0)<=pre_latch(pre_latch'high downto 0);
end if;
end process;

end Behavioral;:!::!::!: