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Confused on floating terminals

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yann_sun

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hi all,
it seems very popular using MOS with one of its terminal floating in circuit layout, as i know. In most cases, taking PMOS as an example, Source terminal of PMOS is connected to VDD, VGate is located at some potential, and Drain terminal floats without any connection. The device appears in IO, core, ESD or anyplace of the chip.

One of my question is why not connecting together D and S terminals of PMOS by some potential or kept both floating, if its function is to back up for IC fix(FIB etc) or serve as a capacitor . If not, what the device with one of its terminals floating is used for?
 

If it is for possible future design change better to keep source-drain disconnected. If they connected you have to change one more layer to disconnect them.
For example, you can make a change by VIA and Me2 layers, but because source drain is shorted by Me1 you have to change Me1 also.
From another point of view I don't see any advantages if they will be connected.
 

Fom said:
If it is for possible future design change better to keep source-drain disconnected. If they connected you have to change one more layer to disconnect them.
For example, you can make a change by VIA and Me2 layers, but because source drain is shorted by Me1 you have to change Me1 also.
From another point of view I don't see any advantages if they will be connected.
Click to expand...

If terminal drain floats, does it mean Vdrain is not determined? I am not sure about the possibility of latchup occurrence.
 

It will be vds=0 at such case, as there is weak DC path, this is not a real floating terminal case. However, gate floading may lead circuit to unknow state.
 

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