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Using DDR SDRAM as video memory

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BlackOps

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i want to run C program on PowerPC on Virtex2 Pro, drawing any graphic on the monitor, my controller is 1024x768 60Hz. i will use TwinMOS 512mb CL3 PC3200 DDR SDRAM DIMM module as a video memory.


i will have to use DDR memory as a video memory. and i think that the organization must be as on the picture which i attached to this message. please take a look.

So, a C program will run on PPC. PPC will write VGA data on the write FIFO, writeFIFO will write this data to the DDR memory, another readFIFO will read it from the DDR and pass it to the VGActrl state machine, the VGActrl will then write data to the monitor.

i think that two buffers with the specified range must be used, so that they will switch, and there will be no glitches during the image update.

writeFIFO writes data in BUF1, when the BUF1 is full, readFIFO begins reading from BUF1. (shown with blue line) and writeFIFO then writes data to BUF2.

then, when the BUF2 is full, readFIFO begins reading from BUF2, (shown with red line) and writeFIFO then writes data again in BUF1. and so on.

question: how to say to VGActrl state machine that BUF1 (or BUF2) is full, so it can begin reading from it?

it happens continiously and fast, so the image is updated in time and displayed correctly.

i have a 1024x768 and 60Hz VGA controller. so i can calculate the size of the buffers needed.

(1024x768x24) / 8 = 2.359296 MBytes (for one buffer)

the speed of the transfer will be: 2.359296 x 60Hz = 141,55776 MBytes/second

total video memory needed BUF1 + BUF2 = 2.359296 + 2.359296 = 4.718592 MBytes


but the main problem now is in DDR IP core...

do i have to use Xilinx DDR PLB IP core? (DS425 v 2.00) ? will it be possible to use double buffering described above with XIlinx DDR IP core??

or do i have to write down my own?


ok, please tell me what you think about organization in a whole, and are there errors in my calculations... tell ur opinion. and if its ok, could u advice me what to start with? (i alreadyhave VHDL for the video signal generation) thanks! cya!
 

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