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VHDL Loop error: Process Statement must contain only one Wait Statement

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syyang85

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This is a typical counter which counts until 31 with every clock coming in
but im havin this error
Error (10398): VHDL Process Statement error at count31.vhd(27): Process Statement must contain only one Wait Statement
Click to expand...

why can't i have more than more than 1 wait statement in the process, if not how am i ever to loop it?
any ideas?

library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;

entity COUNT31 is

port ( CLK: in std_logic;

COUNT: out integer);

end COUNT31;

architecture behav_COUNT of COUNT31 is

begin

P_COUNT: process

variable intern_value: integer;

begin

intern_value:=0;
while (intern_value<31) loop

wait until CLK='1';
intern_value:=intern_value + 1;
COUNT <= intern_value;

end loop;

end process P_COUNT;

end behav_COUNT;
Click to expand...

when i try to change wait until CLK='1'; to if (CLK'event and CLK='1') then

It gave me warning of exceeding 10,000 iteration.

Why it wont exit the loop when the condition of (intern_value<31) is fulfilled?
 

Re: VHDL Loop error

Instead of giving verbose explanations, why the code won't be synthesizable, may I simply ask, what you wan't to achieve?
 

Re: VHDL Loop error

Actually I was experimenting with the Loop statements.

Actually, im building a data acquisition module for a camera

Here's the scenario, typical camera have vsync,href,pclk and 8-bits data.
vsync represents new frame
href represents new line
pclk represents new pixel
**broken link removed**
I would like to capture the first 50x50 pixels of the frame and another frame after the 60th frame.

All I need is two frames.

I'm getting this error
Error (10519): VHDL Type or Variable Declaration error at camera.vhd(44): bounds of type or variable range must have same type
Click to expand...

Error (10515): VHDL type mismatch error at camera.vhd(44): integer type does not match string literal
Click to expand...

Here my code:
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

ENTITY camera IS

PORT
(
start : IN STD_LOGIC;
pixel : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
clk : IN STD_LOGIC;
vsync : IN STD_LOGIC;
href : IN STD_LOGIC;
pclk : IN STD_LOGIC;

pixel_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
reference : OUT STD_LOGIC
);

END camera;

ARCHITECTURE behave OF camera IS

SIGNAL frame_count : STD_LOGIC_VECTOR(6 DOWNTO 0);
SIGNAL line_count : STD_LOGIC_VECTOR(6 DOWNTO 0);
SIGNAL pixel_count : STD_LOGIC_VECTOR(6 DOWNTO 0);

BEGIN



PROCESS (vsync, href, pclk)
BEGIN

IF start='1' THEN--------------------------------------------STARTS THE CAPTURING SEQUENCE

frame_count <= (OTHERS => '0');
line_count <= (OTHERS => '0');
pixel_count <= (OTHERS => '0');

IF(vsync'EVENT AND vsync = '1' ) THEN
FOR frame_count IN "0000000" TO "111100" LOOP
frame_count <= frame_count + "0000001"; -------------COUNTS FRAME UNTIL 60

IF(href'EVENT AND href = '1' ) THEN
FOR line_count IN "0000000" TO "110010" LOOP
line_count <= line_count + "0000001";---------COUNTS LINE UNTIL 50

IF(pclk'EVENT AND pclk = '1' ) THEN
FOR pixel_count IN "0000000" TO "110010" LOOP
pixel_count <= pixel_count + "0000001"; --COUNTS PIXEL UNTIL 50

pixel_out<=pixel;-----------------------------OUTPUTS THE PIXEL DATA
reference<='1';------------------------------FOR SAVING THE DATA INTO RAM PURPOSES
END LOOP;

END IF;
END LOOP;
END IF;
END LOOP;
END IF;
ELSE

null;
END IF;


END PROCESS;

END behave;
Click to expand...
 

Re: VHDL Loop error

Yes, I see what you are intending. But it doesn't work this way. Taking just a snippet from code:
Code: 
IF(href'EVENT AND href = '1' ) THEN 
FOR line_count IN "0000000" TO "110010" LOOP 
line_count <= line_count + "0000001";---------COUNTS LINE UNTIL 50 
...
END LOOP;
END IF;

First there is a syntax error. line_count as the loop parameter is already iterated by the FOR .. LOOP statement. It don't need an explicite declaration and must not be assigned a value.

Furthermore, the code doesn't work as intended. I understand, that href events shall be counted. But actually, the iteration is executed for each line. Basically, you can't build a counter this way.
 

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