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Help me declare and initialize an array

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anandanips

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we need in our program 256 loctions of 8 bit wide i.e., producing 256 Byte ram.
we are using it by array but we are geting error message for declaring the array. actually we are displaying the data stored in ram,therefore it is one output port, so in our program we are written code as follows

module xy(x,y,ram);
input x,y;
output [7:0] ram[0:255];

reg[7:0] ram[0:255];
tell me how to declare array,initialise array..... and clear my error...

thanks in advance
 

array implementation

you cannot transfer the entire ram to the o/p try to read a particular address location(1-byte) from ram and transfer it out
 

Re: array implementation

i work with above type of array to use as ram block in xilinx

what i found out is most probably not ram functionality is obtainable above type of reg arry.mostly they synthesize them in rom block in my case

so i think it is better to use block ram. the codes can be found on ISE--->Edit--->tempelates or can generated using core generator


in that way you can clearly see the ram block in rtl design

hope this will help you. good luck


rgds
dilan
 

Re: array implementation

what i found out is most probably not ram functionality is obtainable above type of reg arry
That happens for sure when the memory isn't actually written in the design.
 

array implementation

think what kalyansrinivas state are correct, your output should be only 8bits and u cannot output the entire ram.

beside, u can specified a block ram attribute to allow the synthesis tool to recognize it's a block ram.

for example:
xilinx XTS: //synthesis attribute ram_style of mem is distributed (or block)

Presicion: //pragma attribute mem ram_block FALSE (or TRUE)

synplify: RAM[XX:0] /* synthesis syn_ramstyle = "no_rw_check"*/;
 

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