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How to solve this FF/Latch trimming warning (XST 1895)?

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mindstream

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I get the following warning during synthesis each time. is it serious?
Loading device for application Rf_Device from file '3s400.nph' in environment /opt/Xilinx.
WARNING:Xst:1710 - FF/Latch <o2_2_9> (without init value) has a constant value of 0 in block <twiddle_multi>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <o2_2_10> (without init value) has a constant value of 0 in block <twiddle_multi>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <o2_2_11> (without init value) has a constant value of 0 in block <twiddle_multi>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <o2_2_12> (without init value) has a constant value of 0 in block <twiddle_multi>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <o2_2_13> (without init value) has a constant value of 0 in block <twiddle_multi>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <o2_2_14> (without init value) has a constant value of 0 in block <twiddle_multi>.
INFO:Xst:2261 - The FF/Latch <o2_2_15> in Unit <twiddle_multi> is equivalent to the following 9 FFs/Latches, which will be removed : <o2_2_16> <o2_2_17> <o2_2_18> <o2_2_19> <o2_2_20> <o2_2_21> <o2_2_22> <o2_2_23> <o2_2_24>

If it is serious can someone tell me how to correct this problem.

o2_2 is a 26bit signal
i did the coding in verilog Its basically for a set of 8 complex multipliers and o2_2 is one of the outputs . none of the other output signals are showing this warning.

If needed i can attach the verilog code as well.
 

FF/Latch Trimming

In my opinion it is quite possible you did some mistake in your design so the FF/latches shown do not change their states at all.
I have to say that although I work with Xilinx and VHDL I do not know Verilog.
 

Re: FF/Latch Trimming

It sounds like you created latches with a defined value of zero.

Attach your code so we can see what you did.

E
 

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