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What's the use of floating GP on PAD cell?

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electronXwork

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hi to all,

While I am making a Chip layout I noticed the floating GP on the PAD standard cell. Can anyone tell me what are the use of these floating GP. Please see the picture.


tnx
 

Re: floating GP on PAD

electronXwork said:
hi to all,

While I am making a Chip layout I noticed the floating GP on the PAD standard cell. Can anyone tell me what are the use of these floating GP. Please see the picture.


tnx
Click to expand...

i think those floating polys have no used.
i guess that layout is extracted from previous layout and since the transistor is diode-connected, there is no more reason for those GPs to stay.
if some of the multiples are controlled by other signal, that GP will be used for future revision (changing the multiple of the output transistor).
 

Re: floating GP on PAD

protonixs said:
........ transistor is diode-connected, there is no more reason for those GPs to stay.
if some of the multiples are controlled by other signal, that GP will be used for future revision (changing the multiple of the output transistor).
Click to expand...


you are right the transistors are diode-connected because they are used as ESD for this PAD. But looking on the orientation of the floating gate I think it will not be possible for it to change the multiple of the transistor.

if you have an idea i will really appreciate if u will share it...

tnx
 

Re: floating GP on PAD

electronXwork said:
protonixs said:
........ transistor is diode-connected, there is no more reason for those GPs to stay.
if some of the multiples are controlled by other signal, that GP will be used for future revision (changing the multiple of the output transistor).
Click to expand...


you are right the transistors are diode-connected because they are used as ESD for this PAD. But looking on the orientation of the floating gate I think it will not be possible for it to change the multiple of the transistor.

if you have an idea i will really appreciate if u will share it...

tnx
Click to expand...

come revision time, some multiples of the transistor will not act as diode..
it will be controlled by other signal coming from a certain ckt...
then the connection of the gates will be altered leaving the floating gate to serve as the path from gate to the control signal
hope u got it.
 

Re: floating GP on PAD

Yes, I also know that but I am wondering why do they need another signal to control the ESD Transistor of the pad. I have seen some circuits from the past having ESD transistors controlled by other circuits like the ESD connected to PDO of Charge pump in PLL but never for I/O PAD.
 

Re: floating GP on PAD

electronXwork said:
Yes, I also know that but I am wondering why do they need another signal to control the ESD Transistor of the pad. I have seen some circuits from the past having ESD transistors controlled by other circuits like the ESD connected to PDO of Charge pump in PLL but never for I/O PAD.
Click to expand...


my friend, that transistor is not just ESD transistor, it is an output transistor laid out in accordance with ESD rule to save space.
 

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