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XPS(EDK) & ISE big headache

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bLurLiNg88

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ps2_keyboard.v

hello everyone!

1 more step to complete the project.. however this 1 step vv hard to move and haf error!!
i downloaded 2 file(.v) from net, run using ISE
but i haf to make use of MicroBlaze so need to use EDK too

so i tried to create a EDK .xmp file of submodule of ISE but wen executing the "Implement Design" in ISE this error appear

i tried mani mani solution wif i can find on net but still it doesnt solve the prob.. HELP please!! :(

i haf attach a sceenshot abt the error below..
ERROR.jpg


Thanks in advance :D
 

edk submodule verilog

i think you have to add the bmm file from "implementation" subfolder to the ise project manually.
 

working with xps and ise

thx for the reply! :)

i'vem tried tt method..
n this is the error msg tt came out

ERROR: found identical ISE and XPS BMM files. Copying the BMM file from the XPS project is no longer needed. Please remove the BMM file from the ISE project.

ERROR1.jpg


ani more ideas? do ani1 need mi to attach my project in?
 

adding xps libraries to ise

hello

From the screen shot you have provided i noticed that processor is not added as a sub module to your design.
try the following procedure
1.start ise project
2.add newsource(processor)
3.in the source tab double click on processor (which you have added .xps) wich opens XPS
4.finish your design in XPS
5.once finished desigh generate netlist.
6.return to ise and add existing source(yourcurrentprojectfolder/edkproject/hdl/processname_stub.vhd)
7.once project_stub.vhd/project_stub.v is added, instantiate this project_stub.vhd/.v file as a submodule as required

hope you got it
 

xilinx xuid

THANKS for the reply:D

i think i get u.. xcept for the last step.. how do u intiate it??
i've follow the steps tt u've suggested.. but unfortunately still the same error.. :(
y???!!

wif reference to the sceenshot below.. is the microblaze_stub be under top (test.v) den counted as a sub modude?

ERROR2.jpg


how i wish i noe how to do everything in XPS(EDK) den all solved rite? but den i dunno how to code it in c.. haisz..


for better understanding i've add the project here as atachment..
i got the ISE file from this forum.. the program is actually exact wad i need to do
but oso wif the use of microblaze..
therefore i've created XPS for the ISE file.. n added additional periherals in..
but it cannot work..
 

edk 10 microblaze submodule

actually i really wld wanna try doing everything in .c code for XPS(EDK) 9.1i

overview of the program is

input -> ps/2 kyboard (key in character)
output-> VGA monitor (character to b display on)

sounds simple rite.. but total haf no idea how to code the VGA timing.. Kyboard ascii code thiing.. the vertical/horizontal sync..

does ani 1 haf ani clues oh information which i can refer too??
 

error: could not find the xps module associated

first let me clear how to instantiate processor in top level module

in your project click on microblaze_stub.v,
In process window double click on view HDL instantiation template
once instantiation template gets generated copy and paste it into your design,same as like you do for other submodules.
 

failed to process bmm information

hi!

thanks.. i've try out ur method n the xmp fall under the top(test.v) successfully..
but wen i sythesize it.. wooh! alots of errors

=========================================================================
* HDL Compilation *
=========================================================================
Compiling verilog file "/ps2_keyboard.v" in library work
Compiling verilog file "MicroBlaze/hdl/microblaze.v" in library work
Module <ps2_keyboard_interface> compiled
Module <microblaze> compiled
Module <microblaze_0_wrapper> compiled
Module <mb_opb_wrapper> compiled
Module <debug_module_wrapper> compiled
Module <ilmb_wrapper> compiled
Module <dlmb_wrapper> compiled
Module <dlmb_cntlr_wrapper> compiled
Module <ilmb_cntlr_wrapper> compiled
Module <lmb_bram_wrapper> compiled
Module <sram_256kx32_wrapper> compiled
Module <sram_256kx32_util_bus_split_0_wrapper> compiled
Module <dcm_0_wrapper> compiled
Module <vga_0_wrapper> compiled
Compiling verilog file "/../test.v" in library work
Module <ps2_kbd_driver_0_wrapper> compiled
Module <top> compiled
No errors in compilation
Analysis of file <"top.prj"> succeeded.

ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:/VGA_testing/VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
FATAL_ERROR:Xst:hdlreadxcf.c:275:1.18 - Problem opening the IHDProject. Process will terminate. For more information on this error, please consult the Answers Database or open a WebCase with this project attached at https://www.xilinx.com/support.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
WARNING: The ngc files for partitions could not be added.

Process "Synthesize" failed
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.
ERROR:HierarchicalDesignC:18 - Partition::persistLoad: Failed to read Partition XUID. Partition not loaded.
ERROR:HierarchicalDesignC:60 - Failed to load partition 0 from "D:\VGA_testing\VGA_testing.ise". Partition not loaded.
ERROR:HierarchicalDesignC:62 - Could not find Partition for hierarchy node <>. HDProject not loaded.

BIG HEADACHE! any idea wads tt?
 

partition xuid ise

did you use Partitions in your design
Which version of ISE you are using??
 

hierarchicaldesignc:18 xilinx

hihi

nope i did not use any partition. im using both ISE 9.1i n XPS 9.1i

i realise that my file was corrupted so i re-created it.

when i implement it, i got back my vv 1st error which was the .bmm file 1

lolssss. omg...
 

hdl instantiation template failed ise

can i have the screen shot of that??
 

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