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problem about coregen

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taolibuyan

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could not find module primitive coregen

I just created a math core to calculate division/remainder. I wanted to copy the declaration codes to my verilog file from the language template as I did before. But it's empty, and coregen didn't create any .v file. The VHDL files are normal. What's wrong with it?

I typed the declaration of the core. The synthesis shows

Successfully generated modulus.
Process "Regenerate Core" completed successfully

but

ERROR:HDLCompilers:87 - "thermo2_pixel_correction_4.v" line 1431 Could not find module/primitive 'modulus'.

PS. modulus is the name of the math core.
 

when you build the project you need to choose which hdl language you are working with .
 

hi dudes,
i am sathish kumar. i am also facing same problem when i am running my synthesis tool . can you send this division/remainder program to my mail.it will help me lot
 

WHAT i have understood from your statement is that you are just trying to copy verilog file in your design.

If this is the case then you are missing the .xco file

Core generator creates file with the extension ".xco"
Go to ADD COPY OF SOURCE and add .xco file in your project.

Open the .veo file if you have checked the verilog option
Copy the instantation and paste it in your top module

And then it should work
 

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