How to use Aldec ActiveHDL to develop 16V8 architecture?

Aldec ActiveHDL and 16V8

How to use this package to develop 16V8 architecture? What synthezis tool (compatible to Active-HDL 4.2) use, are there any kind of limitation?
Maybe stupid question, but what is "Implementation tool"? Is it to symulate how code will work in specific programmable structure?

Re: Aldec ActiveHDL and 16V8

Hi .. There are several ways to use programmable logic. One requires that you know verty well the internal structure of the programable logic device .. Then is enough to use a low level language to describe your function in terms of equations .. This tool is almost the equivalent of a assambler ..some are a little bit more sofisticated because they allow state machine descriptions .
Now for more complex devices than the 16v8 . it will be too combersome
to deal with equations for 100 or more cells .. Then you need a systhesis tool .. it synthesises logic from high level language descriptions..
you don't need to know how the functions are built .. Is enough to describe what you want in a language like verilog or VHDL ..
This methology also works with small devices like the 16v8 .but you have to be very careful in how you describe your function ..because your device is very limited ! That's sysnthesis ! is probably an overkill for such a small device !