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scan chain and clock synchronization...

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xristigi

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Hello everybody!!

I need your help since I am due to tape out and I feel out off ideas... I have implemented an SPI with a scan chain that for each rising clock pops out a value. The problem that is is quite possible to occur due paracitics is the following:

Given for example 2 scanable DFF connected so that the second gets the input of the first and the same clock. The clock of the second might be delayed compared to the first one fora time period bigger than the propagation time of the first one. This way the first DFF might become transparent to the scan...

Is there a way to ensure proper operation of the scan chain????

Thank you in advance..

Plutarxa
 

There are Two steps to mitigate the mentioned risk.

1. static Timing Tming Analysis in test Mode to ensure that there are no timing violations. If there are violatiuons fix them at this stage.

2. simulate the test vectors on the final netlist with post layout timing at all corners. This would expose if any issues with STA in test mode.

If you are out of time run limited at speed patterns at all corners.
 

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