Current Mode Design vs Voltage mode designs

• Aug 4, 2007

• #1

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swagata

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current mode vs voltage mode

Hallo everybody!

Current Mode designs are extremely becoming popular now. I invite a general comparison of it with voltage mode designs.Any highlights on the advantage & disadvantage of both methods would be beneficial.

 

• Aug 4, 2007

• #2

paley

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current mode design

you can refer to Dr. Ridley's paper <Voltage mode or current mode>

 

• Aug 4, 2007

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swagata

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paley said:

you can refer to Dr. Ridley's paper <Voltage mode or current mode>

Click to expand...

Plz give me the link

 

• Aug 4, 2007

• #4

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A.Anand Srinivasan

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the main advantage of current mode design is that signal is unattenuated while being transmitted through a resistance which is the most significant factor of most components... whereas voltage when transmitted gets attenuated due to resistance which cannot be avoided...

 

• Aug 5, 2007

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neoflash

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then current mode must be concerned with conductive loss...

 

• Aug 5, 2007

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A.Anand Srinivasan

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what are you meaning by conductive loss... because whether it is a capacitor or inductor or resistor that is modeled in the transmission line it is gonna be in parallel and hence the current is not going to be reduced...

 

• Aug 5, 2007

• #7

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swagata

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Thanks for the discussion.
Plz enlighten me comparing the followings in voltage with current mode.
1.voltage swing/current swing
2.input range
3.impedance
4.slew rate
5.linearity

You can also give me related lectures/tutorials in pdf/link.
Thanks again

 

• Aug 5, 2007

• #8

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A.Anand Srinivasan

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voltage swing would be more in voltage mode design
current swing would be more in current mode design

input range,slew rate and linearity depends on the system for both. lots of trade off will be involved....

output impedance of voltage mode is low and it is high for current mode....

 

• Aug 6, 2007

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paley

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this is the paper

 

• Aug 7, 2007

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jfyan

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hi all
i think the posts above misunderstand what the first author want to discuss.
some people talked about the conceptions of voltage mode and current mode, these i think used mostly in power electronic ic domain.
but i think the first post want to know is, in general analog ic part, what is the difference between voltage and current mode.

correct me if i'm wrong.
good luck
jeff

 

• Aug 7, 2007

• #11

O

oermens

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see this book



the author of the book is professor at my university, he also gave us these brief review notes

 

• Aug 8, 2007

• #12

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swagata

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Thanx to all those who have participated in the discussion & shared their resources here.
Jfyan is also right that I m seriously interested in Analog IC part mainly.But every contribution has enlightened me in their own way.
Thanx again

 

• Feb 14, 2008

• #13

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yutian

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Thanks to all.
I also want to design the Buck step-down dc-dc converter.