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Integrator for dual slope ADC

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pritc

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Hello,

I have designed an integrator with 15 M resistance and 40 PF. The input is a single pulse with a width of 409Us and higher value is 700 mv and lower value is 100mv. The deintegration curve is exponential. How to make it linear?
 

To make the discharge curve linear you need a circuit to generate a constant current such as a current mirror.

Here's
another article of interest.
 

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Hello,
Can you please elaborate a little constant current source should be added where in the circuit?
 

Can you please elaborate a little constant current source should be added where in the circuit?
Where in which circuit? You didn't show your circuit at all.

The commonly used dual slope ADC circuit (as in the above linked Wikipedia article) is based on an active integrator and won't need a current source, just switches the reference voltage to the integrator.
 

Where in which circuit? You didn't show your circuit at all.

The commonly used dual slope ADC circuit (as in the above linked Wikipedia article) is based on an active integrator and won't need a current source, just switches the reference voltage to the integrator.

I used the same circuit as in wikepidea.. My design is integrating but I want to get perfect saw tooth waveform. I have attached the schematic of my circuit.
 

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  • ADC_5.5.PNG
    ADC_5.5.PNG
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I'm unable to recognize a dual-slope topology in your schematic. It looks more like single slope.
 

It is a dual slope topology instead of the control circuit I have given a PWL input. Integration time is 409 Us. I am initially doing the simulation for only one period as I will design the digital part later on.
 

O.K. we can't see the waveforms. To achieve correct integrator behavior, there should be no resistor R1 permantly connected parallel to the integration capacitor.
 

To make the discharge curve linear you need a circuit to generate a constant current such as a current mirror.

Here's
another article of interest.

Can you please explain why do we need a constant current circuit and where do we need to conect the constant current source in the op-amp?
 

O.K. we can't see the waveforms. To achieve correct integrator behavior, there should be no resistor R1 permantly connected parallel to the integration capacitor.

I have tried using the circuit without the resistor, but it does not give proper integration.
 

You might need a reset switch in place of the resistor.
 

You might need a reset switch in place of the resistor.

Do you mean the switch should be closed at the time of de-integration?

- - - Updated - - -

Do you mean the switch should be closed at the time of de-integration?

I have tried using a switch for the deintegration time instead of a resistor parallel to the capacitor. It looks like the circuit is not integrating at all. I have attached the waveform.test1.PNG
 

In principle, a dual-slope circuit doesn't need a reset switch if it performs integration and deintegration phase alternatingly. Deintegration would stop when the integrator output voltage is exactly zero.

Practical dual-slope circuits implement an additional reset or autozero phase after deintegration. In this phase, a reset switch or equivalent reset circuit removes residual integrator charge and provides clean initial conditions for the succeeding integrator phase.

It seems to me that you are more guessing about dual-slope operation than clearly understanding the principle. You may get more clarity by studying existing dual-slope ADC implementations, e.g. ICs like Intersil ICL7106 or Microchip TC500.
 

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