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Vhdl when else statement error

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hareeshP

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hi,
please anybody help me with the issue...:cry::cry:


Code VHDL - [expand]
1
2
ifc_ad8_15 <= "ZZZZZZZZ" when cpu_rst_n and (not rst_hold_f) and (req_rst_r when (req_md_r = "11") else '1') = '1' 
          else rcw_src(0 to 7) when boot_override_r = '1' else "ZZZZZZZZ";



showing the same error
Error (10500): VHDL syntax error at req.vhd(556) near text "when";
expecting ")", or ","
Error (10500): VHDL syntax error at req.vhd(556) near text ")";
expecting ";"
 

You cannot embed when statements within other when statements.
 

Have separate signals for each value..


Code VHDL - [expand]
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a <= '1' when ip else '0';
b <= '1' when a = '1' else '0';

 

Hi,

I can only read VHDL, but not write it, therefore I can´t give you a code solution.

But the key is to think as a digital circuit, not as a software solution.
If you know how to draw your logic as a schematic with digital logic ICs, then you should be able to write the VHDL code.
Maybe a truth table can help.

Klaus
 

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