garvind25
Full Member level 3
Hi,
I was trying to interface a monitor (HP L1506) with an FPGA development board using the Pong P. Chu’s code available here (ch 12; vga_syn.vhd and vga_syn_test.vhd) with a clk of 25 MHz. On doing so the screen displayed a message ‘Input signal out of range. Change settings to 1024X768 – 60 Hz’. When I checked the manual of the monitor (available here), page B-6 listed the VGA resolution as a preset mode which is to be detected automatically. So why am I not getting any display on the screen (when I asserted the reset; the message changed to ‘check display cable’; ie. there is communication between the FPGA development board and the monitor). The development board has 1 pin assigned per colour channel.
Am I doing anything wrong / skipping something? Pls. advise.
Thanking You,
Arvind Gupta
I was trying to interface a monitor (HP L1506) with an FPGA development board using the Pong P. Chu’s code available here (ch 12; vga_syn.vhd and vga_syn_test.vhd) with a clk of 25 MHz. On doing so the screen displayed a message ‘Input signal out of range. Change settings to 1024X768 – 60 Hz’. When I checked the manual of the monitor (available here), page B-6 listed the VGA resolution as a preset mode which is to be detected automatically. So why am I not getting any display on the screen (when I asserted the reset; the message changed to ‘check display cable’; ie. there is communication between the FPGA development board and the monitor). The development board has 1 pin assigned per colour channel.
Am I doing anything wrong / skipping something? Pls. advise.
Thanking You,
Arvind Gupta
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