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Switching power supply much lower output than LTSPICE model

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nagle

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I've been through several iterations of a specialized switching power supply. It underperforms its LTSPICE model by a factor of about 2, and I don't understand why. Here's the schematic:

board2_3.png

These have a selector electromagnet with an inductance of about 5.5H and resistance of 220 ohms. To pull this in takes about 120V at 60mA for about 2ms to overcome the inductance, after which about 12V is enough to sustain.

So the circuit charges up a 2uf capacitor to 120V while the data signal is 0, and when the data signal goes from 0 to 1, dumps the cap into the output. The cap must be charged in less than 22ms (that's one bit time at 45 baud). The whole thing runs from a USB port, so only 500mA at 4.8V is available.

The design is standard; there's a transformer (Coilcraft FA2469-AL) connected to ground through a MOSFET, which is being driven by a 50% duty cycle square wave at about 100KHz. On the output side, there's a diode, so the voltage in the caps ratchets up, much like a photoflash power supply.

All this works, but it takes about 40-50ms to charge the cap to 120V, instead of the 20ms or so that LTSpice predicts. I need more output, and can't figure out how to get it, or why the sim is so far off.

Things I've tried:

- On the real PC board, shorting out all that spike filtering and resistance on the high side of the transformer primary. (That's there to protect the USB port of the computer driving this.) That increases the output by about 20-30%.

- Increasing the MOSFET gate drive. No effect.

- In simulation, changing the switching frequency over a factor of 2 above and below 100KHz doesn't do much.

This is my first switcher, so I don't really know what I'm doing. But clearly I'm doing something wrong.

The project is in KiCAD on Github, here: https://github.com/John-Nagle/ttyloopdriver

LTSpice model is here: https://github.com/John-Nagle/ttyloopdriver/blob/master/circuitsim/ttydriver.asc
 
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Please post the zipped *.asc file at Edaboard, or rename it to *.txt.

You should probe the MOSFET gate and drain waveforms and compare with the simulation results.
 

Please post the zipped *.asc file at Edaboard, or rename it to *.txt.

Just save this link to get the LTSpice model:

https://raw.githubusercontent.com/John-Nagle/ttyloopdriver/master/circuitsim/ttydriver.asc

No external model files required other than the ones that come with LTSpice, so that should run.
Not too sure about the transformer, which is just two LTSpice coupled inductors. In reality, it's a Coilcraft FA2469. ()

The MOSFET has an LTSpice model from LTSpice, so that should be reasonably close.

You should probe the MOSFET gate and drain waveforms and compare with the simulation results.
I'll do that tomorrow. I've been looking mostly at the capacitor charge waveforms.
 

I'm not sure if the github files can be expected to be still accessible after years, if not posting the files on github would violate forum rules about attached files. I imported the file and got unprintable characters for µ needing manual editing, the file seems to be saved as html and is mapping some characters. Another reason to post the *.asc file at Edaboard.

According to my understanding of the datasheet, the Coilcraft transformer shouldn't saturate at 1 or 1.5 A, unfortunately there's no ∫Vdt or L versus I specification.
 

LTspice file attached: ttydriver.txt.

You think the inductor is saturating? That's a possibility; it's a tiny surface-mount inductor.

Notes:
- Was "ttydriver.asc", but I can't upload that suffix per board restrictions.
- It has µ characters on lines such as "SYMATTR Value 470µf". That's a standard UTF-8 text file and it's how LTspice specifies values.
 

Attachments

  • ttydriver.txt
    7.7 KB · Views: 61

At a glance I can't see anything wrong with the simulation. Whatever the problem(s) is, they will fit into two broad categories. Either the switcher is not pulling enough power from the input, or the switcher is less efficient than expected, possibly due to leakage current on the output. Can you measure what the input current/voltage is while the output is charging? Can you show some waveforms of the winding voltages?

You'll notice that on startup the current draw exceeds 0.5A, which might be causing your current limiting switch to trip. And that's not counting the quiescent current of the other circuitry (especially the 12V isolated supply). What happens if you remove some of the extra circuitry and just test the relevant parts that are in the simulation?
 
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Have you determined that the USB supply is not the current
limiter? 120V*60mA/5V=1.44A which seems more stout than
I recall standard (or older, at least) USB being capable of.
Heck, I've had external USB HDDs that needed two USB plugs
to get adequate power.

Seems like the cap charging should only take 10mA (CdV/dt)
which might only demand 250mA (@100% eff). But let the
efficiency slide and you might be on the wrong side of 500mA
source current.
 

Can you measure what the input current/voltage is while the output is charging? Can you show some waveforms of the winding voltages?

Will make voltage measurements at the transformer windings and post pictures of the scope traces, to compare with the sim. I can get a value for primary side current by measuring the voltage across R18.

You'll notice that on startup the current draw exceeds 0.5A, which might be causing your current limiting switch to trip. And that's not counting the quiescent current of the other circuitry (especially the 12V isolated supply). What happens if you remove some of the extra circuitry and just test the relevant parts that are in the simulation?
The current limiting device does go into current limit as the filter caps charge. But once the system has started, the current draw should be below 400mA.

The AP2553W6 acts as a linear current limiter under small or brief overloads until it overheats. Then it turns off until it cools. This is intended to allow big filter caps to charge at startup. It's a physically small part and can't dissipate much power, so it can't act as a linear regulator for long. I've shorted it as a test; after about two seconds the output voltage drops to zero, as it performs its short circuit protection function. If it was going into current limit during operation, the whole circuit would shut down and power cycle every few seconds. It's really obvious if that happens, which it did in an earlier rev.
 

OK, as requested, measured waveforms from an oscilloscope vs. simulated waveforms from LTSpice.

First, cap charging. This is measured between test points W3 and W5.

simcapcharge.jpg
This is what's supposed to happen. The cap charges to 120V in 17ms; then the 120V Zener stops further charging.


capspartialcharge.jpg
What actually happens.

In the 22ms bit time, the voltage only reaches 65-70V.

capsfullcharge.jpg
With enough time, the cap charges fully, and the Zener clamps it.

But it takes more than two bit times to reach full charge.

(Next, the transformer primary waveforms.)

- - - Updated - - -

Now here's what the transformer primary is doing. As above, here's the sim plot.

simprimary.jpg
The two waveforms are the two ends of the transformer primary, relative to ground.
Looks reasonable. What matters is the difference between those two. (Can LTSpice graph that?) Very stable. What's happening on the secondary side isn't affecting the primary much.

Here's the real world:

priregcharge.jpg
There's no ground ref here, so this is symmetrical.

10x probe, across the primary coil. Voltage goes from +40 to -40. The sim goes up to about +45, but only goes down to about -5. Unclear why. Note how the voltage increases over time. That has to come from effects from what's happening on the secondary side, where the cap is charging up. So this is where the model diverges badly from reality.
 
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And, finally, what's going on with the secondary.


simsecondary.jpg
Voltage across the secondary.

Huge excursions on the downward side. Strange effects as the cap charges up.

Here's the real world.

secpartialcharge.jpg
Voltage across secondary

The key point here is that the voltage isn't rising fast enough. It's only at 60v on the high side after 22ms in the real world, instead of hitting 120v in 17 ms in sim.

So that's what I've measured. Comments? Thanks.
 
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You have not answered the question about whether the
xfmr is saturating. That's a big one.

Have you any primary current waveforms? Might not be
that hard to put a sense resistor in the S leg of the dual
FET package.

If that C4 of 1000pF is supposed to be some sort of
snubber, maybe look at that - the topology looks like
flyback but C-only snubbers are not the done thing as
far as my limited reading suggests - RC or RCD are less
lossy. See if you can find any discussion of why that
cap is there shunting the FET (raises Coss, limits slew
rate, returns energy to ground - what's supposed to
be the upside?).
 

Just discovered that the default LTSpice inductor model cannot saturate. The "Peak Current" parameter doesn't do anything. Wrote to Coilcraft to see if they have a SPICE model of the transformer. They have SPICE models for their two-terminal inductors, but not their transformers.
 

Your transformer waveforms aren't really useful... why can't you connect the scope probe to circuit ground? Should be fine with a USB powered device, at least on the primary side. I don't really need to see the high frequency switching waveform, I'm more interested in the DC voltages before and after your input filter (the voltages on test point W1 and across C5).

Also agree that C4 is probably hurting you. I would try removing it, or changing it to an optimized RC snubber.

I doubt that the transformer is saturating, so long as you are applying near the expected pulse width.
 

10x probe, across the primary coil. Voltage goes from +40 to -40.
Just not possible because the MOSFET is clamping negative voltages. Suggests that the measurement results are somehow crappy. Or you have a bad circuit layout with huge parasitic inductances. In the latter case I won't be surprised about erratic behavior.

Instead of showing waveforms with ms time base, it makes more sense to look at a few oscillation periods in the middle of charge action, see rise and fall times and other relevant details.
 

I did a rough calc and got 1.3A for 5uS on time, 5V, 19uH.
That's close-ish to the 1.5A primary rating on the datasheet
but I did not see what the basis was, for that.

Now, if the core is not fully resetting during the "off" time
(and I see nothing explicitly making that so) maybe there
is flux walk / staircasing that leads to eventual saturation.
But flyback converters are kinda outside my scope. Just
a thing to consider.

Given that this is an "open source hardware" design (or
gives that whiff), have you looked into whether others
have a similar experience and maybe solutions? Just
because it's on Teh InterWebz doesn't -necessarily-
mean it's true and completely correct. Or so I've heard.
Point being if it's so accessible and been tried, maybe
there's a pool of knowledge more connected to it, with
more relevant direct experience than our speculations
are. Maybe you find somebody tested it to the point
where a load-line is shown. Or improvements identified.

The core question seems to be why the result does not
match the simulation. But a more useful one might be,
does your result match other independent builds' bench
results. That would be the tie-breaker of choice.
 

As requested, transformer primary current scope traces.

simr18.png

Current through L1, simulated.

r18.jpg

Voltage across R18, actual (inverted).

R18, 2.2Ω, is in series with the high end of the primary of the transformer. So, per I = E/R, 1v on the scope = 0.45A. We only have about 1A in the real world, where we have about 4-5A in simulation. Now we're getting closer to the problem.

That 4 to 5 amps comes from C3, the 470uF cap which levels out the load. The input side of C3 only draws less than half an amp in sim, and C14, another 470uF cap, levels out the load on the USB power source to keep it under 400mA. So there's enough power to make this go.

So what's holding back the current into L1? Something is far different in sim and in the real world.

Could the filter cap have too high an ESR? I use 2 ohms in the sim. It's a Panasonic ECA-1VM471. Data sheet. 35V, no problem there. Most electrolytics in this size have an ESR under 1 ohm. That shouldn't be it.

The MOSFET model is one that came with LTSpice for that device. The primary inductance and resistance of the transformer are from its Coilcraft data sheet.

What am I missing?
 
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OK, so LTSpice's peak current once the load is charged is
close to what a basic V=L*dI/dt (flipped to dI=V/L*dt,
where we assume current starts from zero so dI is Ipeak,
and dt is your 5uS on time, and L is the primary inductance
as specified). So far, so good - LTSpice is reasonable when
no output current is being taken.

Now for a loaded transformer the peak current should be
well higher. The current taken by the load, times the turns
ratio. At the beginning of LTSpice sim there's a really big
spike (=?) and then reasonable-ish 4-5A - so figure 3-4A
primary, which at 18:1 means maybe 200mA delivered
(peak) out the secondary? Still reasonable-ish relative to
the advertised / expected charging.

Now we can see that the top of the primary sags 2 - 0.5V
for the duration of the cycle. This will reduce the primary
current ramp peak against what's calculated.

Maybe you could keep on going with this 'scope work, in
more of an orderly "matchup" way - follow the input power
path, node by node, 'scope and LTSpice probes; put them
side by side (same scale and base if possible - LTSpice
will let you do this with trace properties) and you ought
to plainly see where things start to deviate.
 

You're latest observations are apparently referring to a different simulation circuit than appended in post #5. There's e.g. no R18 at all. Please clarify.

Now for a loaded transformer the peak current should be well higher. The current taken by the load, times the turns ratio.

The original schematic shows a flyback configuration. Respectively there's no direct current transformation taking place.
 

You're comparing those two waveforms improperly. The simulated waveform above clearly shows the peak current in the primary, while the measurement of R18 shows the average primary current. The two aren't going to be equal. You should be comparing that scope waveform to the simulated voltage across R18, which looks something like this when I run it:
Iin1.png
So the start of your waveform matches up fairly well, but at 10ms instead of plateauing around 0.6V (0.27A), the input current decreases and starts ringing until stopping completely at 22ms. Try probing other points in the circuit and see if you see any odd behaviors correlating with that.
 

You're latest observations are apparently referring to a different simulation circuit than appended in post #5. There's e.g. no R18 at all. Please clarify.

The circuit at post 5 has an R18 at line 308:

SYMATTR InstName R18

ttydriverspice.png


Screenshot in LTSpice
Note R18 near upper left.
 
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