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LVDS line to drive single ended controls

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mw_rookie

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I want to use a pair of LVDS line to drive a single ended control line. The control line is used just to enable/disable an IC.
Enable is when driven above 2V, ideally 3.3 V.

I understand that LVDS has a current output and also needs a DC termination in this case. I was thinking of parallel termination and have come up with the scheme in the picture. Will this work?

View attachment Temp.png

Thank you for reading.
 

Hi,

I don't think that LVDS gives reliable voltage levels to drive LVCMOS.
--> use a single LVDS to LVCMOS receiver. It's just a SOT23-6 package. (If I remember right)

Klaus
 

Hi,

I don't think that LVDS gives reliable voltage levels to drive LVCMOS.
--> use a single LVDS to LVCMOS receiver. It's just a SOT23-6 package. (If I remember right)

Klaus

@KlausST: Thanks for the reply.

I do not fully understand your answer. I believe the reliability of the LVDS lines is limited when the voltages are between + 100 mV (w.r.t. the offset). Is this the same problem that you refer to in your answer. Or do you refer to any other issue?

I am looking at ICs too. But wanted to implement with a ckt. if possible.

Thanks again.
 

Either use proper LVDS to CMOS conversion - or remove all terminations and probably get sufficient CMOS swing, but also loose LVDS speed.
 

Hi,

I do not fully understand your answer.
You need to look at the input threshold specification of what you call "single ended DIO".
There is a specification for valid low levels (VIL)
and there is a specification for valid high levels (VIH)

I doubt your LVDS driver is able to satisfy this specifiaction.

Klaus
 

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