ADC 1TAD = 1.6 microsecond

Dear All,

As I know in ADC of pic 16f877a

1TAD = 1.6 microsecond
in 10 bit mode we need 11 TAD's

if we select ADCS0 to ADCS2 = 000

that mean Fosc/2 = Tcy/2 = .5 us if our Fosc = 4MHz
that mean this selection not valid for proper ADC
but as per above Fosc/2 = 4Mhz/2 = 2Mhz and

T=1/f mean 1/2Mhz = 0.000002 s

finally I need to know 0.000002 is sampling time?
further if we select 8 bit mode that mean 2 to the power 8
it sample 256 pieces
as per above ADC module consume 0.000002 s times for sample for one piece
Am I correct track

see my picture


please advice

Dear,
let me clear your doubts one by one >
* As you said we need 11 Tad for one single ADC conversion and 1 Tad should not go below 1.6 uSec ( as per microchip recommendations)...that mean ADCS0 to ADCS2 should be configured with such a value that 1 Tad >= 1.6 uSec. So one conversion time is equal to (1.6 * 11 = 17.6 uSec).
* Though above conversion time holds good for single conversion but apart from that one should also insert some delay before above step...that delay is known as aquisation or settel time...in simple terms one should first select a desired channel and then should wait for some more microseconds and then start the conversion...roughly this settel/aquisation time is around 10 microseconds....let me explain why this settel time is needed....see whenever we select a ADC channel its the analog multiplexer inside MCU which connects the external desired pin to input of ADC comparator...there is some capacitance at this input so to completely charge up this capacitor at input a settle time is needed...so now our conversion time becomes AQUISATION TIME + CONVERSION TIME..so better keep in mind these things.
* Now about your time requirement question in 8 BIT or 10 BIT conversion MODE...first thing to keep in mind is that there is nothing like 8 bit or 10 bit MODE ,ADC always converts in 10 bit MODE.....see actually ADC on 16f877A is 10 bit and it can not be configured to do conversion in only 8 bit mode...what it does is a 10 bit conversion only...but by manupulating Data presentation justification Bits we can extract only 8 bit of upper data bits..so better keep inmind that what its is performing is a complete 10 bit conversion and will consume time calculated for 10 bit conversion... for getting 8 bit results easily just make ADFM bit in ADCON1 to `0`( ADC results LEFT justified) and after conversion is complete read ADRESH register to get 8 bit results.

Hope that all helps..

Dear aashitech,

nice explanation and thanks for your time
let me to lean my remaining questions
as my second picture. can we find the time for each sample as I pointed out in picture
1. if 1TAD = 1.6uSec then to convert 10bit, we need 625KHz( f = 1/1.6us)
I think this is the frequency we need match using (ADCS0 to ADCS2)

2. if our input voltage is 0v to 5v in 10bit mode then the resolution is about 4.8mv (5/1024)
to divide to 1024 samples we use fosc. then can we find the time of one sample in between 1024

please advice

Dear,
Ans_1: If Tad = 1.6uSec then one conversion will take 1.6 * 12 = 19.2 uSec ( not cosidering the Aquisition/settel time as discussed in last post)...so now 52.083 Khz will be the sampling rate...but be aware this is just the sampling frequency...in between every consecutive sample one need to process/store result..so keeping that your actual sampling will be much lower.Please also note that Tad is just the single time unit or in simpler terms Tad is clock time/period for single clock...and as ADC converter converts in 12 Tad..meaning it uses 12 Clocks (Tad is just the period of this clock)....

Ans_2: Please make this question more clear...as per your first statment YES thats true @ 5 Vdc as refrence... resolution will be 4.8mv...please also explain your figure..it seems you are trying to sample Ac sine wave ( that too of AC mains)..is that correct?

Dear aashitech,
or nice you did it again, thanks again and again
I think the way I think is something wrong

well , let me know where did you get the frequency 56.818KHz any calculation
let me know, if one bit for 1TAD, why 10 bits for 11TAD's instant of 10TAD's
as well as can we calculate the sampling frequency?

Next I need to verify this
in acquisition time ADC need to wait until fill the C-hold capacitor
then the C-Hold capacitor is fully charged, it should be disconnected from the loop
then start ADC and when DONE is set, the C-Hold capacitor will connect to the loop. am I correct?
my question is. Is this time is include to the Acquisition time
please advice

Dear,
First of all i would recommend you to throughly study AN546 from microchip...it has what all you want for Microchip`s Midrange device DC module...and PLEASE also correct TOTAL Tad required for 10 bit conversion is 12 Tad not 11 Tad ( same was corrected above in last post)...
Though as per Datasheets etc it states 11.5 Tad for 10 bit of conversion....but there is another half Tad period which lies between the time ADGO/DONE bit is set high to the time internal Comparator of ADC module gets disconnected from PIN/multiplexer..this time is a "minimum acquisition time " which is automatically inserted by MCUs internal Logic(but in majority of applications this is unsufficient..usually you will have to provide your own aquisition delay)
so now you can simply get to the conversion rate of ADC >
single conversion time = 12(Tad) * 1.6(uSec)= 19.2 uSec.
let me do some easy forward maths now
1 second = 1000000 uSec
so 1000000/19.2 uSec = 52083 Hz or 52.083 Khz ( hope i have expanded every term enough so that there are no more doubts.. )

And as far as Holding capacitor cahrge up and disconnection is concerned....yes you are right....see whenever you change channel...the external pin gets connected to ADC internal input ...and the moment you set GO/DONE bit...the ADC internal input gets diconnected from MUX/PIN and after a "minimum aqusition time " ( which is generated automatically by MCUs internal logic)...the conversion actually starts...

Hope I was simple enough in language and explainantion...so that you can get the basic concept

BR
Saifullah khalid

Microchip ADC application,

Dear All
Let's we try to discus about this picture, it will helpfully to all beginners in this forum
what are the hidden things of this picture

any single commence will highly appreciated

Dear,
That is called a transfer function... in simple terms this is showing correspondence of a given analog input to its digital output...though this seems to be a ideal transfer function but in reality there are various factors affecting it..resulting in non linear response...slope in graph will deviate a little from what we call as "ideal path"...usually that error is stated in a given ADC`s datasheet.

BR
Saif