LVS problem for MIMCAP using calibre (IBM 10LPE tech.)

Hi,

I have a problem when I am doing LVS check using calibre tool. I am using IBM 10LPE technology, in the layout, I have a MIMCAP and also put a few transistors underneath. The transistors are RF device so I circle the device by "SXCUT (lable)" and put "sub!" label in the free substrate. Withou mimcap it passes DRC and LVS,
but when I put mimcap on top of the device, DRC passes but LVS says:

''Bad device on layer mimcap_dev at location .... (Too many pins)"

The problem I guess is that when extract the mimcap device, the substrate should be sub!, but in my layout there is a SXCUT which confuses LVS to get the real substrate. So are there any ways to solve this problem? By the way, if i remove SXCUT layer outside the RF device, then the transistors can not pass LVS.

Thank a lot

Since your circuit is small (as i undestand from the above) upload a screenshot of the schematic and layout respectively with the various connections to be clear and visible.

Some comments :

1.)I suppose you have used subc device in your schematic and layout respectively (if yes have you seen an option LVS MARKER ON/OFF at the properties of this component?)
2.)The substrate terminal of the RF transistors shouldn't be connected to sub! but to VSS or VEE (i mean the ground net of your circuit)
3.)SXCUT is not needed for your case,get rid of it.
4.)The substrate terminal of the mimcap devices is indeed connected to sub!

Thanks Jimito13,

Yes, the RF device bulk is connected to VSS, not to sub!. Only the cap sub-node is connected to sub! in the schematic. If I remove the SXCUT, then the substrated will be renamed as VSS instead of sub! during LVS.

Now I think I got the proglem, the design kit implies that it is better to use Assura for RF-device, I tried Assura and it works.

jimito13 said:

Since your circuit is small (as i undestand from the above) upload a screenshot of the schematic and layout respectively with the various connections to be clear and visible.

Some comments :

1.)I suppose you have used subc device in your schematic and layout respectively (if yes have you seen an option LVS MARKER ON/OFF at the properties of this component?)
2.)The substrate terminal of the RF transistors shouldn't be connected to sub! but to VSS or VEE (i mean the ground net of your circuit)
3.)SXCUT is not needed for your case,get rid of it.
4.)The substrate terminal of the mimcap devices is indeed connected to sub!

Click to expand...

Yes,the IBM documents recommend Assura tool for LVS and parasitic extraction.Always read their advices in order to be sure that you are in the right way ;-)

Yeah, you are right

By the way I have a following question, so I got LVS cleaned and then run QRC for post-simulation. But RCX give me failure information as below:

Constructing the RCX run script
Forking: /Cadence/Assura41/tools/assura/bin/32bit/capgen -techdir /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal -lvs /home/runchen/workarea_10lpe/lvs_run/lvsrun.xcn -p2lvs /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/p2lvsfile -sw3d -cap_ground_layer substrate -auto_reorder_off -encrypt -exclude_gate_res -length_units meters -lexclude PC -canonical_res_caps -p PC,allGate,RX -dsub nfet_sd,pfet_sd,nfRF_drain,nfRF_source,pfRF_drain,pfRF_source,nwell_diff,pwell_diff,nw,pwell,sub_diff,substrate -blocking RF_BULK,RX,STI_BOTTOM,PC,M1 -res_blocking RF_BULK:-0.37,pc_parasitic,m1_parasitic -blocking pfRF_dev:0.96,RX,STI_BOTTOM,PC,M1 -res_blocking pfRF_dev:0.03,pc_parasitic,m1_parasitic -blocking pc_model,STI_BOTTOM,RX,PC -blocking m1_model,STI_BOTTOM,RX,PC,M1 -blocking m2_model,STI_BOTTOM,RX,PC,M1,M2 -res_blocking cu_MIM_nw,cu_MIM_bot,cu_MIM_top -res_blocking cu_MIM_pw,cu_MIM_bot,cu_MIM_top -res_blocking cu_MIM_sx,cu_MIM_bot,cu_MIM_top -blocking cu_MIM_nw,HT,QT -blocking cu_MIM_pw,HT,QT -blocking cu_MIM_sx,HT,QT -blocking bondPm1C4,STI_BOTTOM,RX,M1,LD -blocking bondPbfC4,STI_BOTTOM,RX,LD -blocking bondPrxC4,STI_BOTTOM,RX,LD -blocking bondPm1,STI_BOTTOM,RX,M1,LD -blocking bondPbf,STI_BOTTOM,RX,LD -blocking bondPrx,STI_BOTTOM,RX,LD -blocking havar_dev,STI_BOTTOM,RX,M1 -blocking VPNP,STI_BOTTOM,RX,M1 -blocking ngrvpnp,STI_BOTTOM,RX,M1 -res_blocking vncap_top1,m1_parasitic -res_blocking vncap_top2,m1_parasitic,m2_parasitic -res_blocking vncap_top3,m1_parasitic,m2_parasitic,m3 -res_blocking vncap_top4,m1_parasitic,m2_parasitic,m3,m4 -res_blocking vncap_top5,m1_parasitic,m2_parasitic,m3,m4,m5 -res_blocking vncap_topba,m1_parasitic,m2_parasitic,m3,m4,m5,ba_m1_2x -blocking vncap_top1,M1 -blocking vncap_top2,M1,M2 -blocking vncap_top3,M1,M2,M3 -blocking vncap_top4,M1,M2,M3,M4 -blocking vncap_top5,M1,M2,M3,M4,M5 -blocking vncap_topba,M1,M2,M3,M4,M5,BA -res_blocking TL2_OA_M5,oa,m5 -res_blocking TL2_OA_M4,oa,m4 -res_blocking TL2_OA_M3,oa,m3 -res_blocking TL2_OA_M2,oa,m2_parasitic -res_blocking TL2_OA_M1,m1_parasitic,oa -res_blocking TL2_OA_BA,oa,ba_m1_2x -res_blocking TL2_M5_M4,m5,m4 -res_blocking TL2_M5_M3,m5,m3 -res_blocking TL2_M5_M2,m5,m2_parasitic -res_blocking TL2_M5_M1,m5,m1_parasitic -res_blocking TL2_M4_M3,m4,m3 -res_blocking TL2_M4_M2,m4,m2_parasitic -res_blocking TL2_M4_M1,m4,m1_parasitic -res_blocking TL2_M3_M2,m3,m2_parasitic -res_blocking TL2_M3_M1,m3,m1_parasitic -res_blocking TL2_M2_M1,m2_parasitic,m1_parasitic -res_blocking TL2_LD_OA,ld,oa -res_blocking TL2_LD_M5,ld,m5 -res_blocking TL2_LD_M4,ld,m4 -res_blocking TL2_LD_M3,ld,m3 -res_blocking TL2_LD_M2,ld,m2_parasitic -res_blocking TL2_LD_M1,m1_parasitic,ld -res_blocking TL2_LD_BA,ld,ba_m1_2x -res_blocking TL2_BA_M5,ba_m1_2x,m5 -res_blocking TL2_BA_M4,ba_m1_2x,m4 -res_blocking TL2_BA_M3,ba_m1_2x,m3 -res_blocking TL2_BA_M2,ba_m1_2x,m2_parasitic -res_blocking TL2_BA_M1,ba_m1_2x,m1_parasitic -blocking TL2_OA_M5,STI_BOTTOM,RX,OA,M5 -blocking TL2_OA_M4,STI_BOTTOM,RX,OA,M4 -blocking TL2_OA_M3,STI_BOTTOM,RX,OA,M3 -blocking TL2_OA_M2,STI_BOTTOM,RX,OA,M2 -blocking TL2_OA_M1,STI_BOTTOM,RX,M1,OA -blocking TL2_OA_BA,STI_BOTTOM,RX,OA,BA -blocking TL2_M5_M4,STI_BOTTOM,RX,M5,M4 -blocking TL2_M5_M3,STI_BOTTOM,RX,M5,M3 -blocking TL2_M5_M2,STI_BOTTOM,RX,M5,M2 -blocking TL2_M5_M1,STI_BOTTOM,RX,M5,M1 -blocking TL2_M4_M3,STI_BOTTOM,RX,M4,M3 -blocking TL2_M4_M2,STI_BOTTOM,RX,M4,M2 -blocking TL2_M4_M1,STI_BOTTOM,RX,M4,M1 -blocking TL2_M3_M2,STI_BOTTOM,RX,M3,M2 -blocking TL2_M3_M1,STI_BOTTOM,RX,M3,M1 -blocking TL2_M2_M1,STI_BOTTOM,RX,M2,M1 -blocking TL2_LD_OA,STI_BOTTOM,RX,LD,OA -blocking TL2_LD_M5,STI_BOTTOM,RX,LD,M5 -blocking TL2_LD_M4,STI_BOTTOM,RX,LD,M4 -blocking TL2_LD_M3,STI_BOTTOM,RX,LD,M3 -blocking TL2_LD_M2,STI_BOTTOM,RX,LD,M2 -blocking TL2_LD_M1,STI_BOTTOM,RX,M1,LD -blocking TL2_LD_BA,STI_BOTTOM,RX,LD,BA -blocking TL2_BA_M5,STI_BOTTOM,RX,BA,M5 -blocking TL2_BA_M4,STI_BOTTOM,RX,BA,M4 -blocking TL2_BA_M3,STI_BOTTOM,RX,BA,M3 -blocking TL2_BA_M2,STI_BOTTOM,RX,BA,M2 -blocking TL2_BA_M1,STI_BOTTOM,RX,BA,M1 -res_blocking TL1_OA_M5,oa,m5 -res_blocking TL1_OA_M4,oa,m4 -res_blocking TL1_OA_M3,oa,m3 -res_blocking TL1_OA_M2,oa,m2_parasitic -res_blocking TL1_OA_M1,m1_parasitic,oa -res_blocking TL1_OA_BA,oa,ba_m1_2x -res_blocking TL1_M5_M4,m5,m4 -res_blocking TL1_M5_M3,m5,m3 -res_blocking TL1_M5_M2,m5,m2_parasitic -res_blocking TL1_M5_M1,m5,m1_parasitic -res_blocking TL1_M4_M3,m4,m3 -res_blocking TL1_M4_M2,m4,m2_parasitic -res_blocking TL1_M4_M1,m4,m1_parasitic -res_blocking TL1_M3_M2,m3,m2_parasitic -res_blocking TL1_M3_M1,m3,m1_parasitic -res_blocking TL1_M2_M1,m2_parasitic,m1_parasitic -res_blocking TL1_LD_OA,ld,oa -res_blocking TL1_LD_M5,ld,m5 -res_blocking TL1_LD_M4,ld,m4 -res_blocking TL1_LD_M3,ld,m3 -res_blocking TL1_LD_M2,ld,m2_parasitic -res_blocking TL1_LD_M1,m1_parasitic,ld -res_blocking TL1_LD_BA,ld,ba_m1_2x -res_blocking TL1_BA_M5,ba_m1_2x,m5 -res_blocking TL1_BA_M4,ba_m1_2x,m4 -res_blocking TL1_BA_M3,ba_m1_2x,m3 -res_blocking TL1_BA_M2,ba_m1_2x,m2_parasitic -res_blocking TL1_BA_M1,ba_m1_2x,m1_parasitic -blocking TL1_OA_M5,STI_BOTTOM,RX,OA,M5 -blocking TL1_OA_M4,STI_BOTTOM,RX,OA,M4 -blocking TL1_OA_M3,STI_BOTTOM,RX,OA,M3 -blocking TL1_OA_M2,STI_BOTTOM,RX,OA,M2 -blocking TL1_OA_M1,STI_BOTTOM,RX,M1,OA -blocking TL1_OA_BA,STI_BOTTOM,RX,OA,BA -blocking TL1_M5_M4,STI_BOTTOM,RX,M5,M4 -blocking TL1_M5_M3,STI_BOTTOM,RX,M5,M3 -blocking TL1_M5_M2,STI_BOTTOM,RX,M5,M2 -blocking TL1_M5_M1,STI_BOTTOM,RX,M5,M1 -blocking TL1_M4_M3,STI_BOTTOM,RX,M4,M3 -blocking TL1_M4_M2,STI_BOTTOM,RX,M4,M2 -blocking TL1_M4_M1,STI_BOTTOM,RX,M4,M1 -blocking TL1_M3_M2,STI_BOTTOM,RX,M3,M2 -blocking TL1_M3_M1,STI_BOTTOM,RX,M3,M1 -blocking TL1_M2_M1,STI_BOTTOM,RX,M2,M1 -blocking TL1_LD_OA,STI_BOTTOM,RX,LD,OA -blocking TL1_LD_M5,STI_BOTTOM,RX,LD,M5 -blocking TL1_LD_M4,STI_BOTTOM,RX,LD,M4 -blocking TL1_LD_M3,STI_BOTTOM,RX,LD,M3 -blocking TL1_LD_M2,STI_BOTTOM,RX,LD,M2 -blocking TL1_LD_M1,STI_BOTTOM,RX,M1,LD -blocking TL1_LD_BA,STI_BOTTOM,RX,LD,BA -blocking TL1_BA_M5,STI_BOTTOM,RX,BA,M5 -blocking TL1_BA_M4,STI_BOTTOM,RX,BA,M4 -blocking TL1_BA_M3,STI_BOTTOM,RX,BA,M3 -blocking TL1_BA_M2,STI_BOTTOM,RX,BA,M2 -blocking TL1_BA_M1,STI_BOTTOM,RX,BA,M1 -res_blocking CPW2_OA,oa -res_blocking CPW2_M5,m5 -res_blocking CPW2_M4,m4 -res_blocking CPW2_M3,m3 -res_blocking CPW2_M2,m2_parasitic -res_blocking CPW2_M1,m1_parasitic -res_blocking CPW2_LD,ld -res_blocking CPW2_BA,ba_m1_2x -res_blocking CPW1_OA,oa -res_blocking CPW1_M5,m5 -res_blocking CPW1_M4,m4 -res_blocking CPW1_M3,m3 -res_blocking CPW1_M2,m2_parasitic -res_blocking CPW1_M1,m1_parasitic -res_blocking CPW1_LD,ld -res_blocking CPW1_BA,ba_m1_2x -blocking CPW2_OA,STI_BOTTOM,RX,OA -blocking CPW2_M5,STI_BOTTOM,RX,M5 -blocking CPW2_M4,STI_BOTTOM,RX,M4 -blocking CPW2_M3,STI_BOTTOM,RX,M3 -blocking CPW2_M2,STI_BOTTOM,RX,M2 -blocking CPW2_M1,STI_BOTTOM,RX,M1 -blocking CPW2_LD,STI_BOTTOM,RX,LD -blocking CPW2_BA,STI_BOTTOM,RX,BA -blocking CPW1_OA,STI_BOTTOM,RX,OA -blocking CPW1_M5,STI_BOTTOM,RX,M5 -blocking CPW1_M4,STI_BOTTOM,RX,M4 -blocking CPW1_M3,STI_BOTTOM,RX,M3 -blocking CPW1_M2,STI_BOTTOM,RX,M2 -blocking CPW1_M1,STI_BOTTOM,RX,M1 -blocking CPW1_LD,STI_BOTTOM,RX,LD -blocking CPW1_BA,STI_BOTTOM,RX,BA -res_blocking SYMINDP_OA_sx,m5,ba_m1_2x,oa -res_blocking SYMINDP_OA_pw,m5,ba_m1_2x,oa -res_blocking SYMINDP_OA_M5_sx,m5,ba_m1_2x,oa -res_blocking SYMINDP_OA_M5_pw,m5,ba_m1_2x,oa -res_blocking SYMINDP_OA_M5_m1p,m1_parasitic,m2_parasitic,m5,ba_m1_2x,oa -res_blocking SYMINDP_OA_M5_m1m,m1_parasitic,m2_parasitic,m5,ba_m1_2x,oa -res_blocking SYMINDP_OA_M5_bf,m5,ba_m1_2x,oa -res_blocking SYMINDP_OA_m1p,m1_parasitic,ba_m1_2x,oa -res_blocking SYMINDP_OA_m1m,m1_parasitic,ba_m1_2x,oa -res_blocking SYMINDP_OA_bf,ba_m1_2x,oa -res_blocking SYMINDP_LD_sx,ld -res_blocking SYMINDP_LD_pw,ld -res_blocking SYMINDP_LD_M5_sx,ld,m5 -res_blocking SYMINDP_LD_M5_pw,ld,m5 -res_blocking SYMINDP_LD_M5_m1p,ld,m5,m1_parasitic,m2_parasitic -res_blocking SYMINDP_LD_M5_m1m,ld,m5,m1_parasitic,m2_parasitic -res_blocking SYMINDP_LD_M5_bf,ld,m5 -res_blocking SYMINDP_LD_m1p,m1_parasitic,ld -res_blocking SYMINDP_LD_m1m,m1_parasitic,ld -res_blocking SYMINDP_L
*** ASSURA capgen VERSION 3.2 Red Hat Linux release 7.2 (Enigma) - (07/07/2010-10:53) ***


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capgen Capgen results will be written to directory: /home/runchen/workarea_10lpe/lvs_run/lvsrun
*WARNING* at "capgen": x-tile size is not floating point number
*WARNING* at "capgen": x-tile size is not floating point number
*WARNING* at "capgen": x-tile size is not floating point number
*WARNING* at "capgen": x-tile size is not floating point number
*WARNING* at "capgen": x-tile size is not floating point number
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 58 The lines in section 'metal_variations' with keyword 'auto_comb' should have this format:
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 58 layer name w/s w/s_min
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 81 expected 'metal_combinations', found 'via_effects'
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 83 expected 'metal_combinations', found 'CA_RX'
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 84 expected 'metal_combinations', found 'CA_RX_P'
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 85 expected 'metal_combinations', found 'endvia_effects'
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 95 expected 'metal_combinations', found 'endprocess'
*ERROR* at "capgen": capgen job quit due to process file errors.

quitting.
D_bf,ld -blocking SYMINDP_OA_sx,STI_BOTTOM,RX,BA,OA -blocking SYMINDP_OA_pw,STI_BOTTOM,RX,BA,OA -blocking SYMINDP_OA_M5_sx,STI_BOTTOM,RX,M5,BA,OA -blocking SYMINDP_OA_M5_pw,STI_BOTTOM,RX,M5,BA,OA -blocking SYMINDP_OA_M5_m1p,STI_BOTTOM,RX,M1,M2,M5,BA,OA -blocking SYMINDP_OA_M5_m1m,STI_BOTTOM,RX,M1,M2,M5,BA,OA -blocking SYMINDP_OA_M5_bf,STI_BOTTOM,RX,M5,BA,OA -blocking SYMINDP_OA_m1p,STI_BOTTOM,RX,M1,M2,BA,OA -blocking SYMINDP_OA_m1m,STI_BOTTOM,RX,M1,M2,BA,OA -blocking SYMINDP_OA_bf,STI_BOTTOM,RX,BA,OA -blocking SYMINDP_LD_sx,STI_BOTTOM,RX,BA,OA,LD -blocking SYMINDP_LD_pw,STI_BOTTOM,RX,BA,OA,LD -blocking SYMINDP_LD_M5_sx,STI_BOTTOM,RX,M5,BA,OA,LD -blocking SYMINDP_LD_M5_pw,STI_BOTTOM,RX,M5,BA,OA,LD -blocking SYMINDP_LD_M5_m1p,STI_BOTTOM,RX,M1,M2,M5,BA,OA,LD -blocking SYMINDP_LD_M5_m1m,STI_BOTTOM,RX,M1,M2,M5,BA,OA,LD -blocking SYMINDP_LD_M5_bf,STI_BOTTOM,RX,M5,BA,OA,LD -blocking SYMINDP_LD_m1p,STI_BOTTOM,RX,M1,M2,BA,OA,LD -blocking SYMINDP_LD_m1m,STI_BOTTOM,RX,M1,M2,BA,OA,LD -blocking SYMINDP_LD_bf,STI_BOTTOM,RX,BA,OA,LD -res_blocking INDS_OA_LD_m1m,m1_parasitic,oa,ld,m5 -res_blocking INDS_OA_LD_bf,oa,ld,m5 -res_blocking INDS_BA_OA_m1m,m1_parasitic,oa,ba_m1_2x,m5 -res_blocking INDS_BA_OA_bf,ba_m1_2x,oa,m5 -blocking INDS_OA_LD_m1m,STI_BOTTOM,RX,OA,M1,LD,M5 -blocking INDS_OA_LD_bf,STI_BOTTOM,RX,OA,LD,M5 -blocking INDS_BA_OA_m1m,STI_BOTTOM,RX,BA,M1,OA,M5 -blocking INDS_BA_OA_bf,STI_BOTTOM,RX,BA,OA,M5 -res_blocking INDP_OA_LD_m1m,m1_parasitic,oa,ld,m5 -res_blocking INDP_OA_LD_bf,oa,ld,m5 -res_blocking INDP_BA_OA_m1m,m1_parasitic,oa,ba_m1_2x,m5 -res_blocking INDP_BA_OA_bf,ba_m1_2x,oa,m5 -blocking INDP_OA_LD_m1m,STI_BOTTOM,RX,OA,M1,LD,M5 -blocking INDP_OA_LD_bf,STI_BOTTOM,RX,OA,LD,M5 -blocking INDP_BA_OA_m1m,STI_BOTTOM,RX,BA,M1,OA,M5 -blocking INDP_BA_OA_bf,STI_BOTTOM,RX,BA,OA,M5 /home/runchen/workarea_10lpe/lvs_run/lvsrun
*WARNING* Bad return status from RCX script generator. 0x100




Do you know how should i fix this problem? Actually I run LVS succesfully and then run RCX.

All the story is here :

capgen Capgen results will be written to directory: /home/runchen/workarea_10lpe/lvs_run/lvsrun
*WARNING* at "capgen": x-tile size is not floating point number
*WARNING* at "capgen": x-tile size is not floating point number
*WARNING* at "capgen": x-tile size is not floating point number
*WARNING* at "capgen": x-tile size is not floating point number
*WARNING* at "capgen": x-tile size is not floating point number
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 58 The lines in section 'metal_variations' with keyword 'auto_comb' should have this format:
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 58 layer name w/s w/s_min
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 81 expected 'metal_combinations', found 'via_effects'
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 83 expected 'metal_combinations', found 'CA_RX'
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 84 expected 'metal_combinations', found 'CA_RX_P'
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 85 expected 'metal_combinations', found 'endvia_effects'
*WARNING* at "capgen": file /home/runchen/TechFile/IBM_PDK/cmos10lpe/V1.5.0.2RF/Assura/QRC/cmos10lpe_5_01_00_01_LD_nominal/procfile, line 95 expected 'metal_combinations', found 'endprocess'
*ERROR* at "capgen": capgen job quit due to process file errors.

Are you sure that you are using the correct setup at the LVS form (process files,switches etc.)?This is the one point.
The other is at the QRC tabs.Is setup done according to IBM's recommendations in the manuals?
With the above points correct maybe the process file is corrupted.

I can't guess something else...

Acutally I figured the Assura LVS problem, I should enble the QRC in .cshrc file. Then QRC should be done. Thank you Jimito13.

But still, I have the probem with LVS. The problem is similar as I mentioned previously,

In schematic, I have a RF_transistor (bulk terminal connected to VSS) and MIMCAP (sub terminal to "sub!").

In layout, the RF_transistor is under the MIMCAP, I draw a big box by SXCUT layer (label) to include the whole layout. Then LVS says that in layout, the MIMCAP sub terminal should be connected to sub! instead of VSS. SO how do I solve this problem? In short, if I put an RF_transistor under MIMCAP, what I should do for LVS check.

Thanks,

...But still, I have the probem with LVS. The problem is similar as I mentioned previously...

Click to expand...

I think that you told in earlier post that with Assura you solved this problem,right?
Is this question referred to the calibre run?

Anyway put a subc device in schematic and layout and run LVS again with SXCUT removed.

Well, it is Assura LVS. Same problem as Calibre. There is another reason that I switch from Calibre to Assura since Calibre can not recognize the multiplicity of the MIMCAPs.

The subc! problem exsits for both. Last night I did the experiment by drawing SXCUT box underneath MIMCAP and change the local substarte names. This way there is no LVS problem. Today I put a real RF device and then the prolem shows up again.

Right now I have a compromised solution: in schematic, connect the sub node of the MIMCAP which is on top of RF devices to be VSS instead of sub!. I know that the simulation is no longer as accurate as before but since these capacitors are mainly by-pass caps or ac-coupling caps, I think the performance might not degrade. Very nasty problems though...

Thanks again for your reply.

jimito13 said:

I think that you told in earlier post that with Assura you solved this problem,right?
Is this question referred to the calibre run?

Anyway put a subc device in schematic and layout and run LVS again with SXCUT removed.

Click to expand...

Why don't you insert subc in your schematic and layout?
Isn't it available in this pdk?
I think this causes your problem...