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Tasks and Functions - Performance

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carrot

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Hi,

Which is better in terms of performance - Tasks or functions?
I have observed - Many of them use Functions rather than Tasks? How is it useful in terms of Performance?

Thanks
 

Functions in Verilog disallow storage units. Which means any logic described by functions are fully combinational logic.
Tasks, on the other side, allow bufs. So task can be used to describe both combinational logic and sequential logic.
However, the logic described in tasks, especially when sequential logic is described in these tasks, is not synthesizable, at least for old-fashioned tools.

Put it in a simple way, the performance of a circuit is decided by its structure. Both task and function can be used to described the same structure.
But tasks may not be synthesiable and are normally forbidden in RTL Verilog codes.

Using tasks in testbenches are totally alright and it is the right thing to do.
 
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