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Transmisson Gate usage

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kumar_eee

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Does people in the industry prefer using Transmission Gate in their design?
 

Yes I think so....as far as I know latches/flops are designed using transmission gates....which are followed by the inverter pair...
though they have a disadvantage of taking up more are as transmission gate takes up 4 transistors(much more area) when compared to a pass gate
 
It depends on what you design.
For a full custom microprocessor for high-end market, transmisstion gates are frequently used for the speed, but I have never seen the transmission gate cell used for ASIC.
 

I heard that we can't model the input capacitance for the Transmission gates & the noise margin is very low as it will propagate the glitch also.
 

there are a few reasons why a transmission gate is not popular in automated flow for asic design.
Can't make a timing library since input slew depends on the output load.
It creates a floating node unless you have a keeper.
combining multiple of them, it may create a DC path.
Being used for a mux, you must comply with one-hotness on the select signal.

No one wants to deal with these issues unless they are doing a full custom design.
 
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Hi lostinxlation, Thanks alot for the detailed answer. I've never seen any Transmission gates in my timing libraries & I used to wonder why. Now I got the answer.
 

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