connecting a pin of the design to either vcc or ground

hello ,
i have generated a blockram using coregen and it has a we[0:0](write enable)
i dont need that so ,i need to keep this always enabled.....
so how can this be done?
in the toplevel module calling this block with 1'b1 is ok...?


ie

bram u1(.we(1'b1,.dina(dina......)

is that ok?

Please elaborate how you dont need the we signal of memory. If you dont need a we than you are not going to write anything in your memory, then why you need a memory at all.


I assume you want always keep that signal enabled, to be able to write in memory any time you want . If this is the case, then there may be some trick there: which is to be able to read the data from memory you need to keep we disabled. So if you keed we always enabled than the memory may not allow you to read the data from it.

haykp said:

So if you keed we always enabled than the memory may not allow you to read the data from it.

Click to expand...

I suppose it's dual port memory. In my design I also have a RAM with WE constantly tied high.

---------- Post added at 10:26 ---------- Previous post was at 10:25 ----------

dll_fpga said:

bram u1(.we(1'b1,.dina(dina......)

is that ok?

Click to expand...

Indeed it is.

Alexium,

Somehow agree with you. But what if the RAM second port has the capability to perform read operation as well, in this case the second port data reading feature is not being used.

If this is OK, then yes the it can be always enabled. But heyy what about power consumption of the memory. The memory power consumption can increased if we keep the we always enabled, this needs to be checked in memory datasheet.

haykp said:

Alexium,
Somehow agree with you. But what if the RAM second port has the capability to perform read operation as well, in this case the second port data reading feature is not being used.

Click to expand...

Of course. I'm just saying, that it is possible to think of situation when setting WE to '1' is not an error, like in my case with simple dual-port RAM (one port for reading and the other - for writing).

---------- Post added at 14:07 ---------- Previous post was at 14:05 ----------

haykp,
for what applications should one consider such a small power consumption increase as the one from BRAM? I can't think of any, since FPGA are usually not used in portable devices. Or are they?..

Alexium,

Frankly I considered issue more general and as a RAM model I assumed the RAM can be used in processor, codecs and so on, where the power consumption is critical. As such devices, containing RAMs, are used in battery powered devices like mobiles.

haykp said:

Frankly I considered issue more general and as a RAM model I assumed the RAM can be used in processor, codecs and so on, where the power consumption is critical. As such devices, containing RAMs, are used in battery powered devices like mobiles.

Click to expand...

Oh, I see. Makes sense.