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[SOLVED] How do I convert RGB16 (565) to RGB24 (888) using Verilog?

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vjabagch

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I am using a Chrontel 7301C transmitter and my code is posted below. I can not seem to determine which part of my 12 bit pixel value to fill with binary 1's or binary 0's to produce the proper color. I want to produce a bright hue so I was thinking of using 1's as the color padding to bring up the brightness.


Code:
	always @(posedge XCLK_N)
	begin
		if (!DVI_RESET_B)
		begin
			pixel_select <= 1'b0;
			DATA[11:0] <= 12'h000;
		end
		else
		begin
			if (~DATA_ENABLE)
			begin
				pixel_select <= 1'b0;
				DATA[11:0] <= 12'h000;
			end
			else
			begin
				if (pixel_select == 0)
				begin
					DATA[11:0] <= {GREEN[4:2], BLUE[7:3]};
					//DATA[11:0] <= {GREEN[3:0], BLUE[7:0]};
					pixel_select <= 1'b1;
				end
				else
				begin
					DATA[11:0] <= {RED[7:3], GREEN[7:5]};
					//DATA[11:0] <= {RED[7:0], GREEN[7:4]};
					pixel_select <= 1'b0;
				end
			end
		end
	end
 

After some thinking I realized that it would be much better if I simply fetch 16 bit color from my module and pass it through the DVI controller using 24 bit mode. The Chrontel chip would be initialized to 24 bit RGB but it would only receive 16 bits of dynamic color. I would have to assign the lower 3,2,3 for {R,G,B} to either 0 or some value that is related to the upper significant bits. I have not yet determined the scheme to output the lower significant bits.

R[7:0] = r7 r6 r5 r4 r3 0 0 0
G[7:0] = g7 g6 g5 g4 g3 g2 0 0
B[7:0] = b7 b6 b5 b4 b3 0 0 0
 

Hi,

the best to do is to use the msb for the lsb.

R[7:0] = r7 r6 r5 r4 r3 r7 r6 r5
G[7:0] = g7 g6 g5 g4 g3 g2 g7 g6
B[7:0] = b7 b6 b5 b4 b3 b7 b6 b5

this gives an equal distribution of the output color codes and max color will still be the max color and min color is still the min color

regards
 
Thank you for the help. I see that my approach was a bit uneven. I think I can say that this is now resolved!
 

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