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design delta sigma modulator with 0.18uCMOS

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t_heidari_elc

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hi. i want to design delta sigma modulator with 0.18uCMOS .is any body help me?
:cry:
 

i would need more specifications to help! sampling frequency, Bandwidth and Resolution and DT or CT and almost always if low OSR and high bandwidth then its CT.

Jgk
 

hi.thankyou.
more specification
Signal-BW < 20KHz
SFDR > 74dB
Pd < 60uWatt
Modulator order < 3
 

just i khow we can get OSR=128
if this cant obtain this P we use OSR=64
 

I would say if you know what you are doing in layout, you could do a 2nd order single bit DT sigma delta converter with an OSR of 64 so, Fs of 2.56Mhz so your amplifiers need a GBW greater then 10MHz, then this yields a SQNR of 79dB. You would also need to have a DC gain meet this equation Pi(Ao+2)>>OSR, which shouldn't be a problem, just keep it in mind! You would then just need to meet your Kt/C requirements so not to lose to much in SNR.

Hope this helps
Jgk
 
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