afujian
Member level 4
Hi,this circuit is from the book "CMOS analog circuit design by Allen",as allen said,the gain of the second stage is (gm8+gm6)/2*RII where RII=(gm12*rds12*rds11)//(gm7*rds7*rds6),but the output resistance seen from the drain of M8 is (R1+1/gm10),it is relatively small,so the gain from M8 may be small,my question is how does allen's result comes out?Thanks!