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"device level" and "circuit level" in VL

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wwang517

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What is the different between "device level" and "circuit level" in VLSI design? I am not sure about the accurate meaning of the two terminologies.
 

Re: "device level" and "circuit level" i

device level - nmos or pmos level simulations. eg. a guy doing Ion , Ioff plot
simulations, I-V curve simulations , etc ...

circuit level - person who designs circuits like connecting nmos/pmos's to form
a nand gate, xor gate, dynamic gates , etc .., and then create
blocks ( like adder , srams, ...) and simulate them.
 

    wwang517

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